公开(公告)号：US11417383B2

公开(公告)日：2022-08-16

申请号：US17186913

申请日：2021-02-26

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Matthew D. Jenkinson ,  Nathaniel J. Meier ,  Dennis G. Montierth

IPC: G11C7/00 ,  G11C11/406 ,  G11C11/408

Abstract: Embodiments of the disclosure are drawn to apparatuses, systems, and methods for dynamic refresh allocation. Memories may be subject to row hammer attacks, where one or more wordlines are repeatedly accessed to cause data degradation in victim rows nearby to the hammered wordlines. A memory may perform background auto-refresh operations, and targeted refresh operations where victim wordlines are refreshed. The memory may monitor access patterns to the memory in order to dynamically allocate the number of targeted refresh operations and auto-refresh operations in a set of refresh operations based on if a hammer attack is occurring and the type of hammer attack which is occurring.

公开(公告)号：US11302374B2

公开(公告)日：2022-04-12

申请号：US16549411

申请日：2019-08-23

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Matthew D. Jenkinson ,  Nathaniel J. Meier ,  Dennis G. Montierth

IPC: G11C7/00 ,  G11C11/406 ,  G11C11/408

Abstract: Embodiments of the disclosure are drawn to apparatuses, systems, and methods for dynamic refresh allocation. Memories may be subject to row hammer attacks, where one or more wordlines are repeatedly accessed to cause data degradation in victim rows nearby to the hammered wordlines. A memory may perform background auto-refresh operations, and targeted refresh operations where victim wordlines are refreshed. The memory may monitor access patterns to the memory in order to dynamically allocate the number of targeted refresh operations and auto-refresh operations in a set of refresh operations based on if a hammer attack is occurring and the type of hammer attack which is occurring.

公开(公告)号：US20220012374A1

公开(公告)日：2022-01-13

申请号：US17482821

申请日：2021-09-23

Applicant: Micron Technology, Inc.

Inventor： Brenton P. Van Leeuwen ,  Nathaniel J. Meier

IPC: G06F21/79 ,  H04L9/06 ,  G06F21/81

Abstract: Memory devices, systems including memory devices, and methods of operating memory devices are described, in which security measures may be implemented to control access to a fuse array (or other secure features) of the memory devices based on a secure access key. In some cases, a customer may define and store a user-defined access key in the fuse array. In other cases, a manufacturer of the memory device may define a manufacturer-defined access key (e.g., an access key based on fuse identification (FID), a secret access key), where a host device coupled with the memory device may obtain the manufacturer-defined access key according to certain protocols. The memory device may compare an access key included in a command directed to the memory device with either the user-defined access key or the manufacturer-defined access key to determine whether to permit or prohibit execution of the command based on the comparison.

公开(公告)号：US11200942B2

公开(公告)日：2021-12-14

申请号：US16549942

申请日：2019-08-23

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Matthew D. Jenkinson ,  Jiyun Li ,  Dennis G. Montierth ,  Nathaniel J. Meier

IPC: G11C11/408 ,  G11C8/16 ,  H03K3/03 ,  G06F12/0802

Abstract: Embodiments of the disclosure are drawn to apparatuses, systems, and methods for lossy row access counting. Row addresses along a to address bus may be sampled. When the row address is sampled it may be compared to a plurality of stored addresses in a data storage unit. If the sampled address matches one of the stored addresses, a count value associated with that address may be updated in a first direction (such as being increased). Periodically, all of the count values may also be updated in a second direction (for example, decreased).

公开(公告)号：US20210225431A1

公开(公告)日：2021-07-22

申请号：US17226975

申请日：2021-04-09

Applicant: Micron Technology, Inc.

Inventor： James S. Rehmeyer ,  Nathaniel J. Meier ,  Joo-Sang Lee

IPC: G11C11/406 ,  H01L25/065

Abstract: Embodiments of the disclosure are drawn to apparatuses and methods for staggering the timing of skipped refresh operations on a memory. Memory cells of memories may need to periodically perform refresh operations. In some instances, auto-refresh operations may be periodically skipped when charge retention characteristics of the memory cells of the memory exceed the auto-refresh frequency. To reduce peak current draw during refresh operations, the skipped refresh operations may be staggered across different portions of the memory. In one example, the skipped refresh operation may be staggered in time among memory dies of the memory to limit a number of memory dies that are performing an auto-refresh operation to a maximum number. In another example, the skipped refresh operation may be staggered in time among memory banks of a single memory array to limit a number of memory banks that are performing an auto-refresh operation to a maximum number.

公开(公告)号：US20210141944A1

公开(公告)日：2021-05-13

申请号：US16677486

申请日：2019-11-07

Applicant: Micron Technology, Inc.

Inventor： Nathaniel J. Meier ,  Brenton P. Van Leeuwen

IPC: G06F21/79

Abstract: Memory devices, systems including memory devices, and methods of operating memory devices are described, in which self-lock security may be implemented to control access to a fuse array (or other secure features) of the memory devices based on a predefined event associated with the memory device operation. The predefined event may include an operating parameter of the memory device, one or more commands directed to the memory device, or both. The memory device may monitor the predefined event and determine that the predefined event satisfies a threshold. The threshold may be related to a time elapsed since the predefined event has occurred or a certain pattern in the one or more commands. Subsequently, the memory device may disable a circuit configured to access the fuse array based on the determination such that an access to the fuse array is no longer allowed.

公开(公告)号：US20210141744A1

公开(公告)日：2021-05-13

申请号：US16677376

申请日：2019-11-07

Applicant: Micron Technology, Inc.

Inventor： Brenton P. Van Leeuwen ,  Nathaniel J. Meier

IPC: G06F12/14 ,  G11C17/16

Abstract: Memory devices, systems including memory devices, and methods of operating memory devices are described, in which security measures may be implemented to control access to a fuse array (or other secure features) of the memory devices based on a secure access key. In some cases, a customer may define and store a user-defined access key in the fuse array. In other cases, a manufacturer of the memory device may define a manufacturer-defined access key (e.g., an access key based on fuse identification (FID), a secret access key), where a host device coupled with the memory device may obtain the manufacturer-defined access key according to certain protocols. The memory device may compare an access key included in a command directed to the memory device with either the user-defined access key or the manufacturer-defined access key to determine whether to permit or prohibit execution of the command based on the comparison.

公开(公告)号：US20210065796A1

公开(公告)日：2021-03-04

申请号：US16553821

申请日：2019-08-28

Applicant: Micron Technology, Inc.

Inventor： Anthony D. Veches ,  Debra M. Bell ,  James S. Rehmeyer ,  Robert Bunnell ,  Nathaniel J. Meier

IPC: G11C14/00 ,  G11C17/18 ,  G11C17/16 ,  G11C11/4096 ,  G11C11/4072

Abstract: Memory devices and systems with automatic background precondition upon powerup, and associated methods, are disclosed herein. In one embodiment, a memory device includes a memory array having a plurality of memory cells and a fuse array configured to store precondition data. The precondition data can identify a portion of the memory array, specify a predetermined precondition state, or a combination thereof. When the memory device powers on, the memory device can be configured to automatically retrieve the precondition data from the fuse array and/or to write memory cells in the portion of the memory array to the predetermined precondition state before executing an access command.

公开(公告)号：US20200334171A1

公开(公告)日：2020-10-22

申请号：US16389633

申请日：2019-04-19

Applicant: Micron Technology, Inc.

Inventor： Nathaniel J. Meier

IPC: G06F12/14 ,  G11C11/406 ,  G06F3/06 ,  G06F21/62

Abstract: Apparatuses and methods related to implementing refresh and access modes for memory. The refresh and access modes can be used to configure a portion of memory. The portions of memory can correspond to protected regions of memory. The refresh and access modes can influence the security level of data stored in the protected regions of memory.

公开(公告)号：US20240282355A1

公开(公告)日：2024-08-22

申请号：US18649696

申请日：2024-04-29

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Nathaniel J. Meier ,  Michael A. Shore

IPC: G11C11/406 ,  G11C11/4076 ,  G11C11/408

CPC classification number: G11C11/40622 ,  G11C11/40615 ,  G11C11/4076 ,  G11C11/4085 ,  G11C11/4087

Abstract: Apparatuses, systems, and methods for controller directed targeted refresh operations. A memory may be coupled to a controller. The memory may identify aggressor addresses based on sampled addresses. The addresses may be sampled based on internal timing logic of the memory and also based on a sampling command received from the controller. The memory may also receive a controller identified aggressor address from the controller. The memory may refresh one or more victim word lines of the identified (either by the memory or the controller) aggressor addresses as part of a targeted refresh operation. Victims of controller identified aggressor addresses may be refreshed before memory identified aggressor addresses.