公开(公告)号：US20120049304A1

公开(公告)日：2012-03-01

申请号：US12872665

申请日：2010-08-31

Applicant: Mario Motz ,  Udo Ausserlechner

Inventor： Mario Motz ,  Udo Ausserlechner

IPC: H01L29/82 ,  H01L21/50

CPC classification number: G01R31/2856 ,  G01R15/202 ,  G01R15/207 ,  G01R33/072 ,  H01L22/30 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2924/0002 ,  H01L2924/00 ,  H01L2924/00014

Abstract: Embodiments relate to IC current sensors fabricated using thin-wafer manufacturing technologies. Such technologies can include processing in which dicing before grinding (DBG) is utilized, which can improve reliability and minimize stress effects. While embodiments utilize face-up mounting, face-down mounting is made possible in other embodiments by via through-contacts. IC current sensor embodiments can present many advantages while minimizing drawbacks often associated with conventional IC current sensors.

Abstract translation: 实施例涉及使用薄晶片制造技术制造的IC电流传感器。 这些技术可以包括使用研磨之前的切割（DBG）的处理，这可以提高可靠性并使应力效应最小化。 虽然实施例利用面朝上安装，但是在其他实施例中通过通孔通孔可以使面朝下安装成为可能。 IC电流传感器实施例可以呈现许多优点，同时最小化通常与常规IC电流传感器相关联的缺点。

公开(公告)号：US08072208B2

公开(公告)日：2011-12-06

申请号：US12130262

申请日：2008-05-30

Applicant: Mario Motz

Inventor： Mario Motz

IPC: G01R35/00

CPC classification number: G01D3/036 ,  G01R33/072 ,  G01R33/091

Abstract: An integrated circuit including an amplifier and a first circuit. The amplifier is configured to receive a sensed signal and provide an amplified signal. The first circuit is configured to track a first signal that is based on the amplified signal. The first circuit includes a first comparator, tracking logic and a first digital to analog converter. The first comparator is configured to respond to a second signal that is based on the first signal and provide a comparator output signal. The tracking logic is configured to receive the comparator output signal and update a digital output. The first digital to analog converter is configured to receive the digital output and provide a tracking signal that is summed with the first signal to provide the second signal.

Abstract translation: 一种包括放大器和第一电路的集成电路。 放大器被配置为接收感测信号并提供放大信号。 第一电路被配置为跟踪基于放大信号的第一信号。 第一电路包括第一比较器，跟踪逻辑和第一数模转换器。 第一比较器被配置为响应于基于第一信号的第二信号并提供比较器输出信号。 跟踪逻辑被配置为接收比较器输出信号并更新数字输出。 第一数模转换器被配置为接收数字输出并提供与第一信号相加的跟踪信号以提供第二信号。

公开(公告)号：US20110199132A1

公开(公告)日：2011-08-18

申请号：US12706570

申请日：2010-02-16

Applicant: Mario Motz ,  Udo Ausserlechner ,  Bernhard Schaffer

Inventor： Mario Motz ,  Udo Ausserlechner ,  Bernhard Schaffer

IPC: H03K3/84 ,  H03K17/00

CPC classification number: G01R15/202 ,  G01R19/0092 ,  G01R33/075

Abstract: A system including a sensing system, a first chopped circuit, a second chopped circuit, and a clock generator. The sensing system is configured to provide sensed input signals. The first chopped circuit is configured to provide a switched output signal that switches in response to values of the sensed input signals crossing a limit. The second chopped circuit is configured to provide a high resolution output signal that corresponds to the sensed input signals and has a higher resolution than the switched output signal. The clock generator is configured to provide clock signals that synchronize chopping of the first chopped circuit and the second chopped circuit.

Abstract translation: 一种包括感测系统，第一斩波电路，第二斩波电路和时钟发生器的系统。 感测系统被配置为提供感测的输入信号。 第一斩波电路被配置为提供切换的输出信号，其响应于检测到的输入信号的极限值而被切换。 第二斩波电路被配置为提供对应于所感测的输入信号并且具有比切换的输出信号更高的分辨率的高分辨率输出信号。 时钟发生器被配置为提供同步第一斩波电路和第二斩波电路的斩波的时钟信号。

公开(公告)号：US07961041B2

公开(公告)日：2011-06-14

申请号：US12121342

申请日：2008-05-15

Applicant: Mario Motz

Inventor： Mario Motz

IPC: H03F1/02 ,  H03F3/45

CPC classification number: H03F3/393 ,  G05F3/30 ,  H03F1/0205 ,  H03F3/45183 ,  H03F3/45475 ,  H03F2203/45136 ,  H03F2203/45534 ,  H03F2203/45616

Abstract: In one embodiment, a circuit having a chopper stabilized amplifier and a network coupled in feedback with the chopper stabilized amplifier is disclosed. The circuit also has a plurality of switches coupled to an output of the chopper stabilized amplifier, and a summing network coupled to the plurality of switches. Ones of the plurality of switches are coupled to ones of a plurality of the summing network inputs.

Abstract translation: 在一个实施例中，公开了具有斩波稳定放大器和与斩波稳定放大器反馈耦合的网络的电路。 电路还具有耦合到斩波稳定放大器的输出的多个开关和耦合到多个开关的求和网络。 所述多个开关的一部分耦合到多个所述求和网络输入中的一个。

公开(公告)号：US07750743B2

公开(公告)日：2010-07-06

申请号：US11966953

申请日：2007-12-28

Applicant: Udo Ausserlechner ,  Mario Motz

Inventor： Udo Ausserlechner ,  Mario Motz

IPC: H03B1/00

CPC classification number: G01D3/02 ,  H03K3/0322 ,  H03L1/022

Abstract: A compensating quantity-providing circuit includes a frequency signal generator having an output for a frequency signal the frequency of which depends on mechanical stress in a circuit, and a compensating quantity provider having an input for the frequency signal and an output for a compensating quantity which is based on the frequency signal.

Abstract translation: 补偿量提供电路包括具有频率信号的输出的频率信号发生器，频率信号的频率取决于电路中的机械应力，以及具有用于频率信号的输入和补偿量的输出的补偿量提供者， 是基于频率信号。

公开(公告)号：US07710298B2

公开(公告)日：2010-05-04

申请号：US12166066

申请日：2008-07-01

Applicant: Mario Motz

Inventor： Mario Motz

IPC: H03M1/06

CPC classification number: H03K5/2481 ,  H03K5/249

Abstract: An integrated circuit includes first and second inputs configured to receive an input signal. A plurality of comparator stages is coupled in parallel to the first and second inputs. Each comparator stage is configured to perform a comparison on the input signal and provide an output signal based on the comparison. A control circuit is configured to cause the comparator stages to switch to an auto-zeroing mode in a staggered manner, thereby compensating offset voltages of the comparator stages while providing a continuous-time digital output signal.

Abstract translation: 集成电路包括被配置为接收输入信号的第一和第二输入。 多个比较器级与第一和第二输入并联耦合。 每个比较器级被配置为对输入信号执行比较，并且基于比较提供输出信号。 控制电路被配置为使比较器级以交错方式切换到自动归零模式，从而补偿比较器级的偏移电压，同时提供连续时间的数字输出信号。

公开(公告)号：US20090295373A1

公开(公告)日：2009-12-03

申请号：US12130262

申请日：2008-05-30

Applicant: Mario Motz

Inventor： Mario Motz

IPC: G01R35/00

CPC classification number: G01D3/036 ,  G01R33/072 ,  G01R33/091

Abstract: An integrated circuit including an amplifier and a first circuit. The amplifier is configured to receive a sensed signal and provide an amplified signal. The first circuit is configured to track a first signal that is based on the amplified signal. The first circuit includes a first comparator, tracking logic and a first digital to analog converter. The first comparator is configured to respond to a second signal that is based on the first signal and provide a comparator output signal. The tracking logic is configured to receive the comparator output signal and update a digital output. The first digital to analog converter is configured to receive the digital output and provide a tracking signal that is summed with the first signal to provide the second signal.

Abstract translation: 一种包括放大器和第一电路的集成电路。 放大器被配置为接收感测信号并提供放大信号。 第一电路被配置为跟踪基于放大信号的第一信号。 第一电路包括第一比较器，跟踪逻辑和第一数模转换器。 第一比较器被配置为响应于基于第一信号的第二信号并提供比较器输出信号。 跟踪逻辑被配置为接收比较器输出信号并更新数字输出。 第一数模转换器被配置为接收数字输出并提供与第一信号相加的跟踪信号以提供第二信号。

公开(公告)号：US20090284242A1

公开(公告)日：2009-11-19

申请号：US12121342

申请日：2008-05-15

Applicant: Mario Motz

Inventor： Mario Motz

IPC: G05F3/20 ,  H03F1/02 ,  H03K3/42

CPC classification number: H03F3/393 ,  G05F3/30 ,  H03F1/0205 ,  H03F3/45183 ,  H03F3/45475 ,  H03F2203/45136 ,  H03F2203/45534 ,  H03F2203/45616

Abstract: In one embodiment, a circuit having a chopper stabilized amplifier and a network coupled in feedback with the chopper stabilized amplifier is disclosed. The circuit also has a plurality of switches coupled to an output of the chopper stabilized amplifier, and a summing network coupled to the plurality of switches. Ones of the plurality of switches are coupled to ones of a plurality of the summing network inputs.

Abstract translation: 在一个实施例中，公开了具有斩波稳定放大器和与斩波稳定放大器反馈耦合的网络的电路。 电路还具有耦合到斩波稳定放大器的输出的多个开关和耦合到多个开关的求和网络。 所述多个开关的一部分耦合到多个所述求和网络输入中的一个。

公开(公告)号：US07440861B2

公开(公告)日：2008-10-21

申请号：US11951169

申请日：2007-12-05

Applicant: Udo Ausserlechner ,  Mario Motz

Inventor： Udo Ausserlechner ,  Mario Motz

IPC: G01R35/00 ,  G01R19/00

CPC classification number: G01L5/0047 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The inventive circuitry on a semiconductor chip includes a first functional element having a first electronic functional-element parameter that exhibits a dependence relating to the mechanical stress present in the semiconductor circuit chip in accordance with a first functional-element stress influence function. The first functional element provides a first output signal based on the first electronic functional-element parameter and mechanical stress. A second functional element has a second electronic functional-element parameter that exhibits a dependence in relation to the mechanical stress present in the semiconductor circuit chip in accordance with a second functional-element stress influence function. The second functional element is configured to provide a second output signal based on the second electronic functional-element parameter and the mechanical stress. A combiner combines the first and second output signals to obtain a resulting output signal exhibiting a predefined dependence on the mechanical stress present in the semiconductor circuit chip.

Abstract translation: 半导体芯片上的本发明的电路包括具有第一电子功能元件参数的第一功能元件，该第一功能元件参数根据第一功能元件应力影响函数呈现出与半导体电路芯片中存在的机械应力相关的依赖性。 第一功能元件基于第一电子功能元件参数和机械应力提供第一输出信号。 第二功能元件具有第二电子功能元件参数，该第二电子功能元件参数根据第二功能元件应力影响函数显示出与半导体电路芯片中存在的机械应力相关的依赖性。 第二功能元件被配置为基于第二电子功能元件参数和机械应力来提供第二输出信号。 组合器组合第一和第二输出信号以获得表现出对存在于半导体电路芯片中的机械应力的预定依赖性的结果输出信号。

公开(公告)号：US07437260B2

公开(公告)日：2008-10-14

申请号：US11037536

申请日：2005-01-17

Applicant: Udo Ausserlechner ,  Mario Motz

Inventor： Udo Ausserlechner ,  Mario Motz

IPC: G01R35/00

CPC classification number: G01L5/0047 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor chip includes a first functional element having a first electronic functional-element parameter exhibiting a dependence relating to the mechanical stress present in the semiconductor circuit chip, and being configured to provide a first output signal, a second functional element having a second electronic functional-element parameter exhibiting a dependence in relation to the mechanical stress present in the semiconductor circuit chip, and being configured to provide a second output signal in dependence on the second electronic functional-element parameter and the mechanical stress, and a combination means for combining the first and second output signals to obtain a resulting output signal exhibiting a predefined dependence on the mechanical stress present in the semiconductor circuit chip, the first and second functional elements being integrated on the semiconductor circuit chip and arranged, geometrically, such that that the first and second functional-element stress influence functions are identical within a tolerance range.

Abstract translation: 半导体芯片包括具有第一电子功能元件参数的第一功能元件，该第一功能元件参数表现出与半导体电路芯片中存在的机械应力有关的依赖性，并且被配置为提供第一输出信号，第二功能元件具有第二电子功能 - 元件参数表现出与半导体电路芯片中存在的机械应力相关的依赖性，并且被配置为根据第二电子功能元件参数和机械应力提供第二输出信号，以及组合装置 第一和第二输出信号以获得表现出对存在于半导体电路芯片中的机械应力的预定依赖性的所得输出信号，第一和第二功能元件集成在半导体电路芯片上并几何地布置，使得第一和第二输出信号 第二个功能元素 s的影响功能在公差范围内是相同的。