Abstract:
Embodiments relate to IC current sensors fabricated using thin-wafer manufacturing technologies. Such technologies can include processing in which dicing before grinding (DBG) is utilized, which can improve reliability and minimize stress effects. While embodiments utilize face-up mounting, face-down mounting is made possible in other embodiments by via through-contacts. IC current sensor embodiments can present many advantages while minimizing drawbacks often associated with conventional IC current sensors.
Abstract:
An integrated circuit including an amplifier and a first circuit. The amplifier is configured to receive a sensed signal and provide an amplified signal. The first circuit is configured to track a first signal that is based on the amplified signal. The first circuit includes a first comparator, tracking logic and a first digital to analog converter. The first comparator is configured to respond to a second signal that is based on the first signal and provide a comparator output signal. The tracking logic is configured to receive the comparator output signal and update a digital output. The first digital to analog converter is configured to receive the digital output and provide a tracking signal that is summed with the first signal to provide the second signal.
Abstract:
A system including a sensing system, a first chopped circuit, a second chopped circuit, and a clock generator. The sensing system is configured to provide sensed input signals. The first chopped circuit is configured to provide a switched output signal that switches in response to values of the sensed input signals crossing a limit. The second chopped circuit is configured to provide a high resolution output signal that corresponds to the sensed input signals and has a higher resolution than the switched output signal. The clock generator is configured to provide clock signals that synchronize chopping of the first chopped circuit and the second chopped circuit.
Abstract:
In one embodiment, a circuit having a chopper stabilized amplifier and a network coupled in feedback with the chopper stabilized amplifier is disclosed. The circuit also has a plurality of switches coupled to an output of the chopper stabilized amplifier, and a summing network coupled to the plurality of switches. Ones of the plurality of switches are coupled to ones of a plurality of the summing network inputs.
Abstract:
A compensating quantity-providing circuit includes a frequency signal generator having an output for a frequency signal the frequency of which depends on mechanical stress in a circuit, and a compensating quantity provider having an input for the frequency signal and an output for a compensating quantity which is based on the frequency signal.
Abstract:
An integrated circuit includes first and second inputs configured to receive an input signal. A plurality of comparator stages is coupled in parallel to the first and second inputs. Each comparator stage is configured to perform a comparison on the input signal and provide an output signal based on the comparison. A control circuit is configured to cause the comparator stages to switch to an auto-zeroing mode in a staggered manner, thereby compensating offset voltages of the comparator stages while providing a continuous-time digital output signal.
Abstract:
An integrated circuit including an amplifier and a first circuit. The amplifier is configured to receive a sensed signal and provide an amplified signal. The first circuit is configured to track a first signal that is based on the amplified signal. The first circuit includes a first comparator, tracking logic and a first digital to analog converter. The first comparator is configured to respond to a second signal that is based on the first signal and provide a comparator output signal. The tracking logic is configured to receive the comparator output signal and update a digital output. The first digital to analog converter is configured to receive the digital output and provide a tracking signal that is summed with the first signal to provide the second signal.
Abstract:
In one embodiment, a circuit having a chopper stabilized amplifier and a network coupled in feedback with the chopper stabilized amplifier is disclosed. The circuit also has a plurality of switches coupled to an output of the chopper stabilized amplifier, and a summing network coupled to the plurality of switches. Ones of the plurality of switches are coupled to ones of a plurality of the summing network inputs.
Abstract:
The inventive circuitry on a semiconductor chip includes a first functional element having a first electronic functional-element parameter that exhibits a dependence relating to the mechanical stress present in the semiconductor circuit chip in accordance with a first functional-element stress influence function. The first functional element provides a first output signal based on the first electronic functional-element parameter and mechanical stress. A second functional element has a second electronic functional-element parameter that exhibits a dependence in relation to the mechanical stress present in the semiconductor circuit chip in accordance with a second functional-element stress influence function. The second functional element is configured to provide a second output signal based on the second electronic functional-element parameter and the mechanical stress. A combiner combines the first and second output signals to obtain a resulting output signal exhibiting a predefined dependence on the mechanical stress present in the semiconductor circuit chip.
Abstract:
A semiconductor chip includes a first functional element having a first electronic functional-element parameter exhibiting a dependence relating to the mechanical stress present in the semiconductor circuit chip, and being configured to provide a first output signal, a second functional element having a second electronic functional-element parameter exhibiting a dependence in relation to the mechanical stress present in the semiconductor circuit chip, and being configured to provide a second output signal in dependence on the second electronic functional-element parameter and the mechanical stress, and a combination means for combining the first and second output signals to obtain a resulting output signal exhibiting a predefined dependence on the mechanical stress present in the semiconductor circuit chip, the first and second functional elements being integrated on the semiconductor circuit chip and arranged, geometrically, such that that the first and second functional-element stress influence functions are identical within a tolerance range.