公开(公告)号：US20190158039A1

公开(公告)日：2019-05-23

申请号：US16190861

申请日：2018-11-14

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Shigeki Koya ,  Takayuki Tsutsui ,  Yasunari Umemoto ,  Isao Obu ,  Satoshi Tanaka

IPC: H03F1/32 ,  H03F3/21 ,  H03F3/19 ,  H03G3/00 ,  H03F1/02 ,  H03F1/56

Abstract: A power amplifier module includes a first amplifier circuit that amplifies a radio frequency signal with a first gain corresponding to a first control signal to generate a first amplified signal; a second amplifier circuit that amplifies the first amplified signal with a second gain corresponding to a second control signal to generate a second amplified signal; and a control unit that generates the first control signal and the second control signal. The second control signal is a control signal for increasing a power-supply voltage for the second amplifier circuit as a peak-to-average power ratio of the radio frequency signal increases. The first control signal is a control signal for controlling the first gain of the first amplifier circuit so that a variation in the second gain involved in a variation in the power-supply voltage for the second amplifier circuit is compensated for.

公开(公告)号：US10249620B2

公开(公告)日：2019-04-02

申请号：US15976682

申请日：2018-05-10

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Isao Obu ,  Shigeru Yoshida ,  Kaoru Ideno

IPC: H03F1/02 ,  H01L23/66 ,  H01L27/06 ,  H01L29/04 ,  H01L29/06 ,  H01L29/08 ,  H01L29/66 ,  H03F3/195 ,  H03F3/213 ,  H01L27/082 ,  H01L29/205 ,  H01L29/417 ,  H01L29/737 ,  H01L21/8222 ,  H01L21/8252

Abstract: A semiconductor device includes a semiconductor substrate and first and second bipolar transistors. The semiconductor substrate includes first and second main surfaces opposing each other. The first bipolar transistor is formed on the first main surface of the semiconductor substrate and includes a first emitter layer. The second bipolar transistor is formed on the first main surface of the semiconductor substrate and includes a second emitter layer and a resistor layer. The resistor layer is stacked on the second emitter layer in a direction normal to the first main surface.

公开(公告)号：US10163829B2

公开(公告)日：2018-12-25

申请号：US15833098

申请日：2017-12-06

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Isao Obu ,  Yasunari Umemoto ,  Masahiro Shibata

IPC: H01L23/00 ,  H01L23/31 ,  H01L29/20

Abstract: A compound semiconductor substrate has a first main surface parallel to a first direction and a second direction perpendicular to the first direction, a second main surface located on a side opposite to the first main surface, and a recess. The recess has an opening, a bottom surface facing the opening, and a plurality of side surfaces located between the opening and the bottom surface. The side surfaces include at least one first side surface forming an angle of about θ degrees with the bottom surface in the recess and at least one second side surface forming an angle of about ϕ degrees with the bottom surface in the recess. The total length of edge lines between the first main surface and the at least one first side surface is larger than that of edge lines between the first main surface and the at least one second side surface.

公开(公告)号：US09397204B2

公开(公告)日：2016-07-19

申请号：US14848090

申请日：2015-09-08

Applicant: MURATA MANUFACTURING CO., LTD.

Inventor： Isao Obu ,  Yasunari Umemoto ,  Atsushi Kurokawa

IPC: H01L21/02 ,  H01L29/66 ,  H01L29/737 ,  H01L29/10 ,  H01L29/08 ,  H01L29/205 ,  H01L29/417

CPC classification number: H01L29/7378 ,  H01L29/0817 ,  H01L29/0821 ,  H01L29/1004 ,  H01L29/205 ,  H01L29/41758 ,  H01L29/66318 ,  H01L29/7371

Abstract: A heterojunction bipolar transistor includes a collector layer composed of a semiconductor containing GaAs as a main component; a base layer including a first base layer and a second base layer the first base layer forming a heterojunction with the collector layer and being composed of a semiconductor containing a material as a main component, the material being lattice-mismatched to the main component of the collector layer, the first base layer having a film thickness less than a critical thickness at which a misfit dislocation is introduced, the second base layer being joined to the first base layer and composed of a semiconductor containing a material as a main component, and the material being lattice-matched to the main component of the collector layer; and an emitter layer that forms a heterojunction with the second base layer.

Abstract translation: 异质结双极晶体管包括由包含GaAs作为主要成分的半导体构成的集电极层; 基底层，包括第一基底层和第二基底层，所述第一基底层与所述集电体层形成异质结，并且由包含材料作为主要成分的半导体构成，所述材料与所述第一基底层的主要成分晶格错配 所述第一基底层的膜厚小于引入失配位错的临界厚度，所述第二基底层被接合到所述第一基底层并且由包含材料作为主要成分的半导体构成， 材料与集电极层的主要成分晶格匹配; 以及与第二基极层形成异质结的发射极层。