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公开(公告)号:US11329146B2
公开(公告)日:2022-05-10
申请号:US17386462
申请日:2021-07-27
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Yasunari Umemoto , Isao Obu , Kaoru Ideno , Shigeki Koya
IPC: H01L29/737 , H01L29/417 , H01L29/423 , H01L29/08 , H01L29/06
Abstract: A collector layer, a base layer, and an emitter layer that are disposed on a substrate form a bipolar transistor. An emitter electrode is in ohmic contact with the emitter layer. The emitter layer has a shape that is long in one direction in plan view. A difference in dimension with respect to a longitudinal direction of the emitter layer between the emitter layer and an ohmic contact interface at which the emitter layer and the emitter electrode are in ohmic contact with each other is larger than a difference in dimension with respect to a width direction of the emitter layer between the emitter layer and the ohmic contact interface.
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公开(公告)号:US11631758B2
公开(公告)日:2023-04-18
申请号:US16810492
申请日:2020-03-05
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Yasunari Umemoto , Isao Obu , Kaoru Ideno , Shigeki Koya
IPC: H01L29/08 , H01L29/06 , H01L29/737
Abstract: A semiconductor device includes a collector layer, a base layer, and an emitter layer that are disposed above a substrate. An emitter mesa layer is disposed on a partial region of the emitter layer. In a plan view, the base electrode is disposed in or on a region which does not overlap the emitter mesa layer. The base electrode allows base current to flow to the base layer. In the plan view, a first edge forming part of edges of the emitter mesa layer extends in a first direction, and a second edge forming part of edges of the base electrode faces the first edge. A gap between the first edge and the second edge in a terminal portion located in an end portion of the emitter mesa layer in the first direction is wider than a gap in an intermediate portion of the emitter mesa layer.
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公开(公告)号:US11949003B2
公开(公告)日:2024-04-02
申请号:US17714860
申请日:2022-04-06
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Yasunari Umemoto , Isao Obu , Kaoru Ideno , Shigeki Koya
IPC: H01L29/737 , H01L29/417 , H01L29/423 , H01L29/06 , H01L29/08
CPC classification number: H01L29/7371 , H01L29/41708 , H01L29/42304 , H01L29/0692 , H01L29/0817
Abstract: A collector layer, a base layer, and an emitter layer that are disposed on a substrate form a bipolar transistor. An emitter electrode is in ohmic contact with the emitter layer. The emitter layer has a shape that is long in one direction in plan view. A difference in dimension with respect to a longitudinal direction of the emitter layer between the emitter layer and an ohmic contact interface at which the emitter layer and the emitter electrode are in ohmic contact with each other is larger than a difference in dimension with respect to a width direction of the emitter layer between the emitter layer and the ohmic contact interface.
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公开(公告)号:US11817356B2
公开(公告)日:2023-11-14
申请号:US17559958
申请日:2021-12-22
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Yasunari Umemoto , Shigeki Koya , Isao Obu , Kaoru Ideno
IPC: H01L29/66 , H01L21/8252 , H01L29/737 , H01L29/15
CPC classification number: H01L21/8252 , H01L29/157 , H01L29/66333 , H01L29/7371
Abstract: A collector layer, a base layer, an emitter layer, and an emitter mesa layer are placed above a substrate in this order. A base electrode and an emitter electrode are further placed above the substrate. The emitter mesa layer has a long shape in a first direction in plan view. The base electrode includes a base electrode pad portion spaced from the emitter mesa layer in the first direction. An emitter wiring line and a base wiring line are placed on the emitter electrode and the base electrode, respectively. The emitter wiring line is connected to the emitter electrode via an emitter contact hole. In the first direction, the spacing between the edges of the emitter mesa layer and the emitter contact hole on the side of the base wiring line is smaller than that between the emitter mesa layer and the base wiring line.
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公开(公告)号:US09997516B2
公开(公告)日:2018-06-12
申请号:US15446785
申请日:2017-03-01
Applicant: MURATA MANUFACTURING CO., LTD.
Inventor: Isao Obu , Shigeru Yoshida , Kaoru Ideno
IPC: H01L27/082 , H01L29/737 , H03F3/195 , H03F3/213 , H01L23/66 , H03F1/02 , H01L29/04
CPC classification number: H01L27/082 , H01L23/66 , H01L29/045 , H01L29/0692 , H01L29/0817 , H01L29/0821 , H01L29/205 , H01L29/41708 , H01L29/66242 , H01L29/737 , H01L29/7371 , H03F1/0238 , H03F3/195 , H03F3/213 , H03F2200/451
Abstract: A semiconductor device includes a semiconductor substrate and first and second bipolar transistors. The semiconductor substrate includes first and second main surfaces opposing each other. The first bipolar transistor is formed on the first main surface of the semiconductor substrate and includes a first emitter layer. The second bipolar transistor is formed on the first main surface of the semiconductor substrate and includes a second emitter layer and a resistor layer. The resistor layer is stacked on the second emitter layer in a direction normal to the first main surface.
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公开(公告)号:US11227804B2
公开(公告)日:2022-01-18
申请号:US16869275
申请日:2020-05-07
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Yasunari Umemoto , Shigeki Koya , Isao Obu , Kaoru Ideno
IPC: H01L29/737 , H01L21/8252 , H01L29/66 , H01L29/15
Abstract: A collector layer, a base layer, an emitter layer, and an emitter mesa layer are placed above a substrate in this order. A base electrode and an emitter electrode are further placed above the substrate. The emitter mesa layer has a long shape in a first direction in plan view. The base electrode includes a base electrode pad portion spaced from the emitter mesa layer in the first direction. An emitter wiring line and a base wiring line are placed on the emitter electrode and the base electrode, respectively. The emitter wiring line is connected to the emitter electrode via an emitter contact hole. In the first direction, the spacing between the edges of the emitter mesa layer and the emitter contact hole on the side of the base wiring line is smaller than that between the emitter mesa layer and the base wiring line.
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公开(公告)号:US11107909B2
公开(公告)日:2021-08-31
申请号:US16436674
申请日:2019-06-10
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Yasunari Umemoto , Isao Obu , Kaoru Ideno , Shigeki Koya
IPC: H01L29/737 , H01L29/423 , H01L29/417 , H01L29/08 , H01L29/06
Abstract: A collector layer, a base layer, and an emitter layer that are disposed on a substrate form a bipolar transistor. An emitter electrode is in ohmic contact with the emitter layer. The emitter layer has a shape that is long in one direction in plan view. A difference in dimension with respect to a longitudinal direction of the emitter layer between the emitter layer and an ohmic contact interface at which the emitter layer and the emitter electrode are in ohmic contact with each other is larger than a difference in dimension with respect to a width direction of the emitter layer between the emitter layer and the ohmic contact interface.
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公开(公告)号:US10249620B2
公开(公告)日:2019-04-02
申请号:US15976682
申请日:2018-05-10
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Isao Obu , Shigeru Yoshida , Kaoru Ideno
IPC: H03F1/02 , H01L23/66 , H01L27/06 , H01L29/04 , H01L29/06 , H01L29/08 , H01L29/66 , H03F3/195 , H03F3/213 , H01L27/082 , H01L29/205 , H01L29/417 , H01L29/737 , H01L21/8222 , H01L21/8252
Abstract: A semiconductor device includes a semiconductor substrate and first and second bipolar transistors. The semiconductor substrate includes first and second main surfaces opposing each other. The first bipolar transistor is formed on the first main surface of the semiconductor substrate and includes a first emitter layer. The second bipolar transistor is formed on the first main surface of the semiconductor substrate and includes a second emitter layer and a resistor layer. The resistor layer is stacked on the second emitter layer in a direction normal to the first main surface.
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