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公开(公告)号：US12184245B2
公开(公告)日：2024-12-31
申请号：US17410003
申请日：2021-08-24
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Jun Enomoto , Yuri Honda , Satoshi Tanaka , Fumio Harima
Abstract: A power amplifier circuit includes: a high pass filter that has one end into which a high frequency input signal is inputted; a first amplifier that amplifies the high frequency input signal outputted from the other end of the high pass filter and outputs a high frequency signal obtained through the first amplification; a second amplifier that amplifies the high frequency signal and outputs a high frequency output signal obtained through the second amplification; an automatic transformer that performs impedance matching between the first amplifier and the second amplifier; and an impedance circuit, one end of which is electrically connected with the other end of the high pass filter, the other end of which is electrically connected with an output terminal of a bias circuit outputting bias voltage or bias current to the first amplifier, and that outputs the high frequency input signal to the bias circuit.
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公开(公告)号：US11929721B2
公开(公告)日：2024-03-12
申请号：US17223384
申请日：2021-04-06
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Satoshi Tanaka , Yoshiaki Sukemori , Takeshi Kogure , Shohei Imai
CPC classification number: H03F3/245 , H03F1/0288 , H03F3/195 , H03F3/68 , H03F2200/451
Abstract: A power amplifier module includes a first amplifier, a power splitter, a second amplifier, a third amplifier, a phase shifter, a combining unit, and a controller. The first amplifier amplifies a first signal and outputs a second signal. The power splitter splits the second signal into a third signal and a fourth signal. The second amplifier amplifies the third signal and outputs a fifth signal. The third amplifier amplifies the fourth signal and outputs a sixth signal. The phase shifter receives the fifth signal and shifts a phase of the fifth signal. The combining unit combines the fifth signal having the phase shifted by the phase shifter and the sixth signal and outputs an amplified signal of the second signal. The controller outputs a first control signal for controlling a power level of the sixth signal output from the third amplifier.
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公开(公告)号：US11916520B2
公开(公告)日：2024-02-27
申请号：US17805277
申请日：2022-06-03
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Satoshi Tanaka , Kiichiro Takenaka , Satoshi Arayashiki , Satoshi Sakurai
CPC classification number: H03F1/0288 , H03F3/195 , H03F3/211 , H03F3/245 , H04B1/0458 , H04B1/44 , H03F2200/102 , H03F2200/219 , H03F2200/27 , H03F2200/294 , H03F2200/429 , H03F2200/504
Abstract: A Doherty amplifier including a main amplifier and a peak amplifier is mounted on a package substrate. A low noise amplifier is further mounted on the package substrate. A transmit/receive switch switches in terms of time between a transmission connection state in which an output signal of the Doherty amplifier is supplied to an antenna and a reception connection state in which a signal received by the antenna is inputted to the low noise amplifier.
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公开(公告)号：US11856525B2
公开(公告)日：2023-12-26
申请号：US18142469
申请日：2023-05-02
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Satoshi Tanaka , Kiichiro Takenaka , Takayuki Tsutsui , Taizo Yamawaki , Shun Imai
IPC: H04W52/24 , H03F3/19 , H03F1/02 , H03F3/21 , H03F3/189 , H04W52/02 , H03F3/24 , H04B1/04 , H04W88/06
CPC classification number: H04W52/246 , H03F1/0216 , H03F1/0227 , H03F1/0277 , H03F3/189 , H03F3/19 , H03F3/21 , H03F3/24 , H04B1/0475 , H04W52/0251 , H04W52/0261 , H03F2200/102 , H03F2200/294 , H03F2200/504 , H04W88/06 , Y02D30/70
Abstract: A high-frequency signal processing apparatus and a wireless communication apparatus can achieve a decrease in power consumption. For example, when an indicated power level to a high-frequency power amplifier is equal to or greater than a second reference value, envelope tracking is performed by causing a source voltage control circuit to control a high-speed DCDC converter using a detection result of an envelope detecting circuit and causing a bias control circuit to indicate a fixed bias value. The source voltage control circuit and the bias control circuit indicate a source voltage and a bias value decreasing in proportion to a decrease in the indicated power level when the indicated power level is in a range of the second reference value to the first reference value, and indicate a fixed source voltage and a fixed bias value when the indicated power level is less than the first reference value.
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公开(公告)号：US11777553B2
公开(公告)日：2023-10-03
申请号：US17663585
申请日：2022-05-16
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Satoshi Sakurai , Satoshi Arayashiki , Satoshi Tanaka , Kyoichi Hirayama , Tomohito Ito , Kenta Kurahashi
CPC classification number: H04B1/48 , H04B1/0057
Abstract: A high-frequency module includes a transmission signal amplifier that outputs a transmission signal to an antenna terminal side; a reception signal amplifier that amplifies a reception signal supplied from an antenna terminal; a switch that selectively connects the antenna terminal to either an output of the transmission signal amplifier or an input of the reception signal amplifier; and a directional coupler that is provided on a transmission signal path and detects a signal level of the transmission signal. The transmission signal amplifier is controlled by a first control signal supplied from a first control circuit. The reception signal amplifier is controlled by a second control signal supplied from a second control circuit. The switch is controlled by a switch control signal supplied from the first control circuit. The directional coupler is controlled by a coupler control signal supplied from the first control circuit.
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Patent Agency Ranking
公开(公告)号：US11658622B2
公开(公告)日：2023-05-23
申请号：US17207879
申请日：2021-03-22
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Satoshi Tanaka , Kazuo Watanabe , Yusuke Tanaka , Satoshi Arayashiki
CPC classification number: H03F3/217 , H03F1/0205 , H03F1/565 , H03F3/2171 , H03F2200/171 , H03F2200/387 , H03F2200/451
Abstract: A power amplifier circuit includes a lower transistor having a first terminal, a second terminal connected to ground, and a third terminal, wherein a first power supply voltage is supplied to the first terminal, and an input signal is supplied to the third terminal; a first capacitor; an upper transistor having a first terminal, a second terminal connected to the first terminal of the lower transistor via the first capacitor, and a third terminal, wherein a second power supply voltage is supplied to the first terminal, an amplified signal is outputted to an output terminal from the first terminal, and a driving voltage is supplied to the third terminal; a first inductor that connects the second terminal of the upper transistor to ground; a voltage regulator circuit; and at least one termination circuit that short-circuits an even-order harmonic or odd-order harmonic of the amplified signal to ground potential.
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公开(公告)号：US11646704B2
公开(公告)日：2023-05-09
申请号：US17238835
申请日：2021-04-23
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Takayuki Tsutsui , Masao Kondo , Satoshi Tanaka
CPC classification number: H03F3/245 , H03F1/301 , H03F1/302 , H03F3/04 , H03F3/19 , H03F3/193 , H03F3/21
Abstract: A power amplifier circuit includes a first transistor that amplifies a first signal and outputs a second signal; a second transistor that amplifies the second signal and outputs a third signal; a bias circuit that supplies a bias current to a base of the second transistor; and a bias adjustment circuit that adjusts the bias current by subjecting the first signal to detection. The bias adjustment circuit controls the bias current such that a first current extracted from the bias circuit depends on a magnitude of the first signal.
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公开(公告)号：US11616479B2
公开(公告)日：2023-03-28
申请号：US16839226
申请日：2020-04-03
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Toshikazu Terashima , Fumio Harima , Makoto Itou , Satoshi Tanaka , Kazuo Watanabe , Satoshi Arayashiki , Chikara Yoshida
IPC: H03F3/213 , H01L29/417 , H01L27/06 , H01L29/737 , H01L29/423 , H01L23/48
Abstract: A power amplifier apparatus includes a semiconductor substrate, a plurality of first transistors on the semiconductor substrate, a plurality of second transistors, at least one collector terminal electrically connected to collectors of the plurality of first transistors, a first inductor having a first end electrically connected to the collector terminal and a second end electrically connected to a power supply potential, at least one emitter terminal electrically connected to emitters of the plurality of second transistors and adjacent to the collector terminal in a second direction, a second inductor having a first end electrically connected to the emitter terminal and a second end electrically connected to a reference potential, and at least one capacitor having a first end electrically connected to the collectors of the plurality of first transistors and a second end electrically connected to the emitters of the plurality of second transistors.
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公开(公告)号：US11601102B2
公开(公告)日：2023-03-07
申请号：US17168618
申请日：2021-02-05
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Hiroaki Tokuya , Hideyuki Sato , Fumio Harima , Kenichi Shimamoto , Satoshi Tanaka , Takayuki Kawano , Ryoki Shikishima , Atsushi Kurokawa
Abstract: A power amplifier circuit includes a first transistor disposed on a semiconductor substrate; a second transistor disposed on the semiconductor substrate and configured to supply a bias current based on a first current which is a part of a control current to the first transistor; a third transistor disposed on the semiconductor substrate and having a collector configured to be supplied with a second current which is a part of the control current and an emitter configured to output a third current based on the second current; a first bump electrically connected to an emitter of the first transistor and disposed so as to overlap a first disposition area in which the first transistor is disposed in plan view of the semiconductor substrate; and a second bump disposed so as to overlap a second disposition area in which the third transistor is disposed in the plan view.
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公开(公告)号：US11552601B2
公开(公告)日：2023-01-10
申请号：US17099297
申请日：2020-11-16
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Shingo Yanagihara , Satoshi Tanaka
Abstract: A power amplifier circuit includes an input-stage power amplifier configured to receive a radio-frequency input signal, an output-stage power amplifier configured to output an amplified radio-frequency output signal, and an intermediate-stage power amplifier disposed between the input-stage power amplifier and the output-stage power amplifier. The intermediate-stage power amplifier includes a first transistor, a second transistor, and a capacitor having a first end connected to an emitter of the first transistor and a second end connected to a collector of the second transistor. The intermediate-stage power amplifier receives a signal at a base of the second transistor thereof and outputs an amplified signal from a collector of the first transistor thereof.
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