摘要:
The present disclosure relates to digital up-conversion for a multi-band Multi-Order Power Amplifier (MOPA) that enables precise and accurate control of gain, phase, and delay of multi-band split signals input to the multi-band MOPA. In general, a multi-band MOPA is configured to amplify a multi-band signal that is split across a number, N, of inputs of the multi-band MOPA as a number, N, of multi-band split signals, where N is an order of the multi-band MOPA and is greater than or equal to 2. A digital upconversion system for the multi-band MOPA is configured to independently control a gain, phase, and delay for each of a number, M, of frequency bands of the multi-band signal for each of at least N−1, and preferably all, of the multi-band split signals.
摘要:
A receiver and method is provided for sigma-delta converting an RF signal to a digital signal and downconverting to a digital baseband signal. The RF signal is split into N phases, as can be accomplished using a sample and hold circuit, and each phase is digitized, as can be accomplished using an analog-to-digital (A/D) sigma-delta converter. Polyphase decimation techniques and demodulation are applied to the phased signals to generate a demodulated digital signal. The demodulated digital signal is further downconverted to the appropriate baseband signal.
摘要:
A predistortion actuator is provided. The predistortion actuator includes a plurality of branches, each of which implements a basis function that acts on a digital input signal. For at least one of the branches, the respective basis function is a sectioned basis function, where each section of the sectioned basis function corresponds to a respective section of a range of at least one input signal characteristic associated with the digital input signal, such as a value range of a magnitude, a temporal characteristic, or a hybrid of the two. A power amplifier system including the predistortion actuator is also provided. Utilizing sectioned basis functions can potentially reduce the hardware resources necessary to realize the predistortion actuator relative to conventional global basis functions. In addition, signal conditioning during coefficient training can potentially be used to reduce the dynamic range of coefficients associated with each sectioned basis function.
摘要:
A method for operating an integrated transceiver, comprising coupling an operating transmitter and an operating receiver within the integrated wideband receiver, inputting a signal into the operating transmitter, performing a first conversion of the signal, wherein the signal is converted into a second signal, transmitting the second signal into the operating receiver, performing a second conversion of the signal, wherein the signal is converted into a third signal, transmitting the third signal into the operating transmitter, and adjusting the operating transmitter.
摘要:
The present invention provides a technique for reducing power levels associated with two or more input signals using peak reduction distortion that is derived from a combined signal, which represents a combination of the input signals.
摘要:
The present invention provides a technique for reducing the peak power of a combined signal that has a first signal of a first modulation type and a second signal of a second modulation type. Based on the combined signal, peak reduction distortion is determined. The peak reduction distortion is configured such that, if applied to the entirety of the combined signal, excessive peaks throughout the combined signal would be reduced. However, instead of applying the entirety of the peak reduction distortion, a selected portion of the peak reduction distortion is applied to a corresponding portion of the combined signal to reduce the peak power of the combined signal.
摘要:
A number of parallel modulation functions are configured to provide sigma-delta modulation on a plurality of low sampling rate signals, which are representative of a high sampling rate input signal. Resultant sigma-delta modulated signals from each of the modulation functions are combined in a multiplexing fashion to create a high sampling rate output signal. The modulation functions may be interdependent, wherein error signals from the modulation functions are provided to a parallel block digital filter, which will provide a processed error signal to feed back into the input of each modulation function. The processed error signal for a given modulation function may be a function of the error signals derived from multiple ones of the modulation functions. In one embodiment, there are N modulation functions, and the operating rate of the modulation functions is fs/N wherein the sampling rate of the high frequency output signal is fs.
摘要翻译:多个并行调制功能被配置为在代表高采样率输入信号的多个低采样率信号上提供Σ-Δ调制。 来自每个调制功能的所得到的Σ-Δ调制信号以多路复用方式组合以产生高采样率输出信号。 调制函数可以是相互依赖的,其中来自调制功能的误差信号被提供给并行块数字滤波器,其将提供经处理的误差信号以反馈到每个调制功能的输入。 用于给定调制函数的经处理的误差信号可以是从多个调制函数导出的误差信号的函数。 在一个实施例中,存在N个调制功能,并且调制功能的工作速率为f N S / N,其中高频输出信号的采样速率为f N s / 。
摘要:
Methods and apparatus are provided for efficiently amplifying or converting a signal. An input signal is decomposed into a plurality of two state signals, each two state signal having a respective on level and off level. This may involve sigma-delta modulation and phase splitting. For amplifier applications, each of the two state signals is amplified with a respective switching power amplifier to produce a respective amplified signal. The amplified signals are combined to produce an amplified version of the input signal. Signals may be adjusted for impairments associated with a subsequent processing operation such as the combining.
摘要:
A method and apparatus for digitally representing a waveform segment defined by discrete ordered pairs of abscissae and ordinates, the ordered pairs being divided into an odd set and an even set. The method includes the steps of: for each even abscissa, generating a difference code representing a difference between an even ordinate paired with the even abscissa and the even abscissa, whereby the even ordinate paired with the even abscissa is represented as the sum of the even abscissa and the corresponding difference code; and for each odd abscissa, generating a differential code representing a differential between an odd ordinate paired with the odd abscissa and an even ordinate corresponding to the odd abscissa, whereby the odd ordinate paired with the odd abscissa is represented as the sum of the corresponding even ordinate and the corresponding differential code.