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公开(公告)号：US4265126A
公开(公告)日：1981-05-05
申请号：US48711
申请日：1979-06-15
CPC分类号： G01S15/8984 , A61B8/06 , G01F1/663 , G01P5/244 , G01S7/52063
摘要： Two components of the velocity of blood or similar liquids and the true flow vector are derived by a linear transducer array cross-beam configuration. Ultrasound pulses are transmitted from the center elements and backscattered echoes are received by left and right receiver sub-arrays whose locations depend on the observation point. A duplex imaging system with a sector scanner incorporates a Doppler modality with little added complexity and provides components of flow velocity parallel to and transverse to the acoustic beam direction from which the true velocity vector is computed.
摘要翻译： 通过线性换能器阵列横梁配置导出血液或类似液体的速度和真实流动矢量的两个分量。 超声脉冲从中心元件发射，后向散射回波由位置取决于观察点的左右接收器子阵列接收。 具有扇区扫描器的双面成像系统结合了多普勒模态，几乎没有增加的复杂性，并且提供平行于并横向于计算真实速度矢量的声束方向的流速的分量。
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公开(公告)号：US4165537A
公开(公告)日：1979-08-21
申请号：US934012
申请日：1978-08-16
IPC分类号： G11C11/56 , G11C19/28 , G11C27/04 , H01L21/339 , H01L29/762 , H01L29/768 , H03H11/26 , G11C27/00
CPC分类号： G11C19/285 , G11C27/04 , H01L29/76808
摘要： Input sampling circuits are described for converting an analog signal into charge samples for charge transfer devices.
摘要翻译： {PG，1描述了用于将模拟信号转换为电荷转移装置的电荷样本的输入采样电路。
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公开(公告)号：US4155260A
公开(公告)日：1979-05-22
申请号：US908908
申请日：1978-05-24
CPC分类号： G01N29/06 , G01N29/4454 , G01S15/8918 , G01S7/52026 , G01N2291/0289 , G01S15/8915
摘要： A real time ultrasound imaging system which includes coherent demodulation of echo signals followed by time delay and coherent summation of the demodulated signals is described. As the range from which echoes are being received increases, coherent demodulation is maintained. Demodulation and time delay accuracies are relatively easy to maintain over a large field of view and a long range. The system has high resolution and high sensitivity.
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54.发明授权
公开(公告)号：US4139783A
公开(公告)日：1979-02-13
申请号：US769200
申请日：1977-02-16
申请人： William E. Engeler
发明人： William E. Engeler
摘要： In a charge transfer transversal filter a substrate of one conductivity type semiconductor material is provided. A first plurality of electrodes insulatingly overlie the substrate, each split into a first and a second part with a small gap therebetween. A second plurality of electrodes insulatingly overlie the substrate, each spaced between the adjacent electrodes of the first plurality. A first clock line is connected to the first parts of the first plurality of electrodes and a second clock line is connected to the second parts of the first plurality of electrodes. A fixed d-c voltage is applied to the first and second clock lines. A voltage pulsating above and below the fixed d-c voltage is applied to the second plurality of electrodes. Means are provided for introducing packets of charge representing sequential samples of an analog signal into the filter. Means are provided for deriving from the first and second lines an output which is representative of the difference in charge underlying the first and second parts of the first plurality of electrodes.
摘要翻译： 在电荷转移横向滤波器中，提供一种导电型半导体材料的衬底。 绝缘地覆盖基板的第一多个电极，每个分离成具有小间隙的第一和第二部分。 绝缘地覆盖基板的第二多个电极，每个间隔开第一多个的相邻电极之间。 第一时钟线连接到第一多个电极的第一部分，并且第二时钟线连接到第一多个电极的第二部分。 固定的d-c电压施加到第一和第二时钟线。 将固定d-c电压以上和下方脉动的电压施加到第二多个电极。 提供了用于将表示模拟信号的顺序样本的电荷分组引入滤波器的装置。 提供了用于从第一和第二行导出表示第一多个电极的第一和第二部分的电荷差异的输出的装置。
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公开(公告)号：US4124862A
公开(公告)日：1978-11-07
申请号：US775662
申请日：1977-03-08
IPC分类号： G11C19/28 , H01L29/768 , H03H15/02 , H01L29/78
CPC分类号： H01L29/76866 , G11C19/285 , H01L29/76808 , H03H15/02
摘要： A charge transfer filter includes an accumulator charge storage location and means for alternately introducing charge into the accumulator charge storage location and then for removing a preselected fraction of the total charge in the accumulator charge storage location so that the total accumulated charge is known.
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公开(公告)号：US4103343A
公开(公告)日：1978-07-25
申请号：US702944
申请日：1976-07-06
IPC分类号： G11C11/35 , G11C19/28 , G11C27/04 , H01L27/108 , G11C11/34
CPC分类号： H01L27/108 , G11C11/35 , G11C19/287 , G11C27/04
摘要： Signal processing apparatus is disclosed comprising a plurality of charge storage cells, each including first and second storage regions in a semiconductor substrate. Means are provided responsive to a scanning signal for introducing into each of the cells a respective quantity of charge, a first portion of which is contained in one of the storage regions and represents a respective analog signal sample. Means are provided for transferring each first portion of charge from one storage region to the other storage region in a respective cell in response to a respective second signal. Means are provided connected in circuit with the first electrodes for sensing the charge transferred to and from the first charge storage regions of the cells for detecting the signal samples.
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公开(公告)号：US5600675A
公开(公告)日：1997-02-04
申请号：US301746
申请日：1994-09-07
申请人： William E. Engeler
发明人： William E. Engeler
CPC分类号： G01S15/89 , G01S7/527 , G01S15/8906 , G01S7/52028 , G01S7/529
摘要： An ultrasonic imaging system which utilizes two summation channels to provide increased bandwidth employs two demodulation stages in each receive channel. The first demodulator receives digital signals from an analog-to-digital converter and demodulates those signals to baseband, thereby producing an in-phase component and a quadrature component. The in-phase and quadrature components are demodulated by the second demodulator, forming a total of four signals which are filtered and combined to form two sets of complex signals. One set corresponds to the upper or high frequencies and the other set corresponds to the lower frequencies. Each band is treated separately in a subsequent phase rotation. The phase changes reflect those required by the center frequency of each of the subbands. The upper band signals are coherently summed in one summation channel, while the lower band signals are coherently summed in another summation channel. The coherently summed upper and lower band signals are then reconstituted into one composite baseband signal.
摘要翻译： 利用两个求和通道提供增加带宽的超声成像系统在每个接收通道中采用两个解调级。 第一解调器从模数转换器接收数字信号并将这些信号解调为基带，从而产生同相分量和正交分量。 同相和正交分量由第二解调器解调，形成总共四个信号，其被滤波和组合以形成两组复信号。 一组对应于高频或高频，另一组对应于较低频率。 在随后的相位旋转中分别对每个波段进行处理。 相位变化反映了每个子带的中心频率所需的相位。 高频带信号在一个求和信道中相干相加，而较低频带信号在另一个求和信道中相干相加。 然后将相干相加的上和下频带信号重构为一个复合基带信号。
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58.发明授权Neural net using capacitive structures connecting input lines and differentially sensed output line pairs 失效使用连接输入线和差分感测输出线对的电容结构的神经网络
公开(公告)号：US5187680A
公开(公告)日：1993-02-16
申请号：US810431
申请日：1991-12-18
申请人： William E. Engeler
发明人： William E. Engeler
IPC分类号： G06N3/063
CPC分类号： G06N3/0635 , G06N3/063
摘要： Neural nets using capacitive structures are adapted for construction in complementary metal-oxide-semiconductor integrated-circuit technology. In each neural net layer synapse input signals are applied to the inverting and non-inverting input terminals of each of a plurality of differential-input non-linear amplifiers by a respective pair of capacitors, which non-linear amplifiers generate respective axon responses. In certain of these neural nets, arrangements are described that make the capacitive structures bilaterally responsive, so that back-propagation calculations can be performed to alter the relative values of capacitors in each pair thereof, which is done during training of certain of the neural nets described.
摘要翻译： 使用电容结构的神经网络适用于互补金属氧化物半导体集成电路技术的构建。 在每个神经网络层中，突触输入信号通过相应的一对电容器施加到多个差分输入非线性放大器中的每一个的反相和非反相输入端子，该非线性放大器产生相应的轴突响应。 在这些神经网络的某些中，描述了使电容结构双向响应的布置，使得可以执行反向传播计算以改变其对中的电容器的相对值，这是在训练某些神经网络期间完成的 描述。
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59.发明授权Neural net using capacitive structures connecting output lines and differentially driven input line pairs 失效使用连接输出线和差分驱动输入线对的电容结构的神经网络
公开(公告)号：US5146542A
公开(公告)日：1992-09-08
申请号：US366839
申请日：1989-06-15
申请人： William E. Engeler
发明人： William E. Engeler
IPC分类号： G06N3/063
CPC分类号： G06N3/063 , G06N3/0635
摘要： Neural nets using capacitive structures are adapted for construction in complementary metal-oxide-semiconductor integrated-circuit technology. Fully differential input amplifiers in each neural net layer apply their push-pull responses to synapse input signals via a pair of input lines. Each push-pull response is applied via a pair of capacitors of complementary capacitance values and an output line to the input of each of a plurality of non-linear output amplifiers in that neural net layer, which generate respective axon responses for that neural net layer. In certain of these neural nets, arrangements are made such that the capacitive structures are bilaterally responsive so that back-propagation calculations can be performed during training periods, to alter the relative values of capacitors in each pair thereof.
摘要翻译： 使用电容结构的神经网络适用于互补金属氧化物半导体集成电路技术的构建。 每个神经网络中的全差分输入放大器通过一对输入线将其推挽响应应用于突触输入信号。 每个推挽响应通过互补电容值的一对电容器和输出线施加到该神经网络层中的多个非线性输出放大器的每一个的输入端，该神经网络层为该神经网络层产生各自的轴突响应 。 在这些神经网络的某些中，进行布置使得电容结构是双向响应的，从而可以在训练周期期间执行反向传播计算，以改变其每对中的电容器的相对值。
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60.发明授权
公开(公告)号：US5140531A
公开(公告)日：1992-08-18
申请号：US561404
申请日：1990-08-01
申请人： William E. Engeler
发明人： William E. Engeler
CPC分类号： G06N3/0481 , G06N3/063
摘要： Plural-bit digital input signals to be subjected to weighted summation in a neural net layer are bit-sliced; and a number N of respective first through N.sup.th weighted summations of the bits of the digital input signals in each bit slice are performed, resulting in a respective set of first through N.sup.th partial weighted summation results. Weighted summations of the partial weighted summation results of similar ordinal number are then performed to generate first through N.sup.th final weighted summation results. Each weighted summation of a bit slice of the digital input signals is performed using a capacitive network that generates partial weighted summation results in the analog regime. In this capacitive network each weight is determined by the difference in the capacitances of a respective pair of capacitive elements. The weighted summation to generate a final weighted summation result also is advantageously done in the analog regime, since this facilitates the analog final weighted summation result being non-linearly processed in an analog amplifier with sigmoidal response. This non-linear processing generates an analog axonal output response for a neural net layer, which analog axonal output response can then be digitized.
摘要翻译： 在神经网络层中进行加权求和的多位数字输入信号是位片分片的; 并且执行每个比特片中的数字输入信号的比特的相应的第一到第N个加权求和的数目N，得到相应的第一至第N部分加权求和结果。 然后执行类似序数的部分加权求和结果的加权和，以产生第一到第N个最终加权求和结果。 使用在模拟方式中产生部分加权求和结果的电容网络来执行数字输入信号的位片的每个加权求和。 在该电容性网络中，每个权重由相应的一对电容元件的电容的差确定。 用于产生最终加权求和结果的加权求和也有利于在模拟方案中进行，因为这有助于模拟最终加权求和结果在具有S形响应的模拟放大器中被非线性处理。 这种非线性处理产生神经网络层的模拟轴突输出响应，然后可以将模拟轴突输出响应数字化。
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