公开(公告)号：US20230112708A1

公开(公告)日：2023-04-13

申请号：US17929034

申请日：2021-02-10

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Kouhei TOYOTAKA ,  Kiyotaka KIMURA

IPC: G09G3/36

Abstract: A semiconductor device using a pass transistor is provided. The semiconductor device includes a first circuit, a second circuit, a plurality of input terminals, and an output terminal. The first circuit includes a plurality of first transistors functioning as pass transistors, and the second circuit includes a plurality of second transistors functioning as pass transistors. Note that the number of the first transistors is larger than the number of the second transistors, a gate of the first transistor is supplied with a first signal, and a gate of the second transistor is supplied with a second signal. The first circuit is supplied with grayscale signals through x input terminals, and the first circuit selects y grayscale signals of the grayscale signals with the first signal. The second circuit is supplied withy (y

公开(公告)号：US20230079181A1

公开(公告)日：2023-03-16

申请号：US17991893

申请日：2022-11-22

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hisao IKEDA ,  Kouhei TOYOTAKA ,  Hideaki SHISHIDO ,  Hiroyuki MIYAKE ,  Kohei YOKOYAMA ,  Yasuhiro JINBO ,  Yoshitaka DOZEN ,  Takaaki NAGATA ,  Shinichi HIRASA

IPC: H01L27/12 ,  H01L27/32 ,  H01L29/786 ,  G09G3/20 ,  G09G3/3233

Abstract: Provided is a display device with extremely high resolution, a display device with higher display quality, a display device with improved viewing angle characteristics, or a flexible display device. Same-color subpixels are arranged in a zigzag pattern in a predetermined direction. In other words, when attention is paid to a subpixel, another two subpixels exhibiting the same color as the subpixel are preferably located upper right and lower right or upper left and lower left. Each pixel includes three subpixels arranged in an L shape. In addition, two pixels are combined so that pixel units including subpixel are arranged in matrix of 3×2.

公开(公告)号：US20220399726A1

公开(公告)日：2022-12-15

申请号：US17879394

申请日：2022-08-02

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Koji KUSUNOKI ,  Toshiyuki ISA ,  Akihiro CHIDA ,  Kouhei TOYOTAKA ,  Ryota TAJIMA

IPC: H02J7/00 ,  H02J50/10 ,  H02J7/04 ,  H02J50/40

Abstract: Deterioration of a storage battery included in an electronic device is reduced. Power consumption of an electronic device is reduced. A power feeding device having excellent performance is provided. The power feeding device includes a power feeding coil, a control circuit, and a neural network and has a function of charging a storage battery with a wireless signal supplied by the power feeding coil. The control circuit has a function of estimating a remaining capacity value of the storage battery, the control circuit has a function of supplying the estimated remaining capacity value to the neural network, the neural network outputs a value corresponding to the supplied remaining capacity value to the control circuit, the control circuit determines a charge condition for the storage battery on the basis of the value output by the neural network, and the power feeding device has a function of charging the storage battery under the determined charge condition.

公开(公告)号：US20220394202A1

公开(公告)日：2022-12-08

申请号：US17441733

申请日：2021-02-17

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Kei TAKAHASHI ,  Kouhei TOYOTAKA ,  Hidetomo KOBAYASHI

IPC: H04N5/378 ,  H01L27/28 ,  H04N5/3745

Abstract: The reading accuracy of an imaging device is increased. Clear image capturing is performed even in the case where the luminance is high. A reading circuit of the imaging device includes an amplifier portion and a conversion portion. The amplifier portion amplifies a potential difference between a first signal and a second signal that are sequentially input and outputs the amplified difference to the conversion portion. The conversion portion converts the output potential of the amplifier portion into a digital value. The amplifier portion is reset on the basis of a first reference potential and the first signal and amplifies the potential difference on the basis of a second reference potential that is different from the first reference potential and the second signal.

公开(公告)号：US20220215810A1

公开(公告)日：2022-07-07

申请号：US17702073

申请日：2022-03-23

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hiroyuki Miyake ,  Kouhei TOYOTAKA ,  Shunpei YAMAZAKI

IPC: G09G3/36 ,  G02F1/1333 ,  G02F1/1345 ,  G02F1/1368 ,  G02F1/1343 ,  G11C19/28 ,  H01L27/12

Abstract: To provide a semiconductor device including a narrowed bezel obtained by designing a gate driver circuit. A gate driver of a display device includes a shift register unit, a demultiplexer circuit, and n signal lines. By connecting the n signal lines for transmitting clock signals to one stage of the shift register unit, (n-3) output signals can be output. The larger n becomes, the smaller the rate of signal lines for transmitting clock signals which do not contribute to output becomes; accordingly, the area of the shift register unit part is small compared to a conventional structure in which one stage of a shift register unit outputs one output signal. Therefore, the gate driver circuit can have a narrow bezel.

公开(公告)号：US20210343243A1

公开(公告)日：2021-11-04

申请号：US17273818

申请日：2019-08-30

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Kei TAKAHASHI ,  Koji KUSUNOKI ,  Kouhei TOYOTAKA ,  Susumu KAWASHIMA ,  Kazunori WATANABE

IPC: G09G3/3258

Abstract: A display device that can correct the threshold voltage of a driving transistor without a correction of image data is provided. A display device including a pixel provided with a driving transistor, a display element, and a memory circuit and a correction data generation circuit is related. One of a source and a drain of the driving transistor is electrically connected to one electrode of the display element, and a gate of the driving transistor is electrically connected to the memory circuit. In a first period, the correction data generation circuit generates correction data that is data for correcting the threshold voltage of the driving transistor. In a second period, first data is written to the memory circuit. In a third period, second data is supplied to the pixel, whereby third data in which the second data is added to the first data is generated. In a fourth period, an image corresponding to the third data is displayed by the display element.

公开(公告)号：US20200341340A1

公开(公告)日：2020-10-29

申请号：US16962304

申请日：2019-01-08

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kei Takahashi ,  Susumu KAWASHIMA ,  Koji KUSUNOKI ,  Kouhei TOYOTAKA ,  Kazunori WATANABE

IPC: G02F1/1362 ,  G02F1/1368 ,  G02F1/137

Abstract: A display apparatus in which a high voltage can be supplied to a display device is provided. The display apparatus includes a data generation circuit, a source driver circuit, and a pixel. The source driver circuit is electrically connected to the pixel through first and second wirings functioning as signal lines. The pixel includes a display device that is a liquid crystal device, a potential of one electrode of the display device can be a potential of the first wiring, and a potential of the other electrode of the display device can be a potential of the second wiring. The image data generation circuit has a function of generating digital image data including first and second data. In the case where image data corresponding to the digital image data is supplied to the pixel, one of the first and second wirings is made to have a potential corresponding to first data, and the other of the first and second wirings is made to have a potential corresponding to the first data. The potential of the first wiring and the potential of the second wiring are interchanged so that frame inversion driving or the like can be performed.

公开(公告)号：US20200185420A1

公开(公告)日：2020-06-11

申请号：US16793543

申请日：2020-02-18

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hisao IKEDA ,  Kouhei TOYOTAKA ,  Hideaki SHISHIDO ,  Hiroyuki MIYAKE ,  Kohei YOKOYAMA ,  Yasuhiro JINBO ,  Yoshitaka DOZEN ,  Takaaki NAGATA ,  Shinichi HIRASA

IPC: H01L27/12 ,  H01L27/32 ,  G09G3/3233 ,  G09G3/20 ,  H01L29/786

Abstract: Provided is a display device with extremely high resolution, a display device with higher display quality, a display device with improved viewing angle characteristics, or a flexible display device. Same-color subpixels are arranged in a zigzag pattern in a predetermined direction. In other words, when attention is paid to a subpixel, another two subpixels exhibiting the same color as the subpixel are preferably located upper right and lower right or upper left and lower left. Each pixel includes three subpixels arranged in an L shape. In addition, two pixels are combined so that pixel units including subpixel are arranged in matrix of 3×2.

公开(公告)号：US20190237483A1

公开(公告)日：2019-08-01

申请号：US16375918

申请日：2019-04-05

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Kouhei TOYOTAKA ,  Jun KOYAMA ,  Hiroyuki MIYAKE

IPC: H01L27/12 ,  G11C19/28 ,  H01L29/786 ,  G09G3/36 ,  G09G3/3258 ,  G09G3/3233 ,  G02F1/1368 ,  G02F1/1362 ,  G02F1/1343 ,  G02F1/1337 ,  G02F1/1334

CPC classification number: H01L27/124 ,  G02F1/1334 ,  G02F1/1337 ,  G02F1/134336 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2201/121 ,  G02F2201/123 ,  G09G3/3233 ,  G09G3/3258 ,  G09G3/3266 ,  G09G3/3275 ,  G09G3/3648 ,  G09G3/3677 ,  G09G3/3688 ,  G09G2300/0426 ,  G09G2310/0286 ,  G09G2310/08 ,  G09G2320/0626 ,  G09G2330/021 ,  G11C19/28 ,  G11C19/287 ,  H01L27/1225 ,  H01L29/7869

Abstract: A semiconductor device includes first and second transistors having the same conductivity type and a circuit. One of a source and a drain of the first transistor is electrically connected to that of the second transistor. First and third potentials are supplied to the circuit through respective wirings. A second potential and a first clock signal are supplied to the others of the sources and the drains of the first and second transistors, respectively. A second clock signal is supplied to the circuit. The third potential is higher than the second potential which is higher than the first potential. A fourth potential is equal to or higher than the third potential. The first clock signal alternates the second and fourth potentials and the second clock signal alternates the first and third potentials. The circuit controls electrical connections between gates of the first and second transistors and the wirings.

公开(公告)号：US20190027507A1

公开(公告)日：2019-01-24

申请号：US16126360

申请日：2018-09-10

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kouhei TOYOTAKA ,  Kei TAKAHASHI ,  Hideaki SHISHIDO ,  Koji KUSUNOKI

IPC: H01L27/12 ,  H01L29/786 ,  H01L29/49 ,  H01L29/04 ,  H01L27/32

CPC classification number: H01L27/1225 ,  H01L27/124 ,  H01L27/1266 ,  H01L27/3262 ,  H01L27/3272 ,  H01L29/045 ,  H01L29/4908 ,  H01L29/78648 ,  H01L29/7869

Abstract: A novel display device or the like in which a transistor connected to a scan line has small gate capacitance is provided. A novel display device or the like in which a scan line has low resistance is provided. A novel display device or the like in which pixels can be arranged with high density is provided. A novel display device or the like that can be manufactured without an increase in cost is provided. In a transistor including a first gate electrode and a second gate electrode, the first gate electrode is formed using a metal material with low resistance and the second gate electrode is formed using a metal oxide material that can reduce oxygen vacancies in an oxide semiconductor layer. The first gate electrode is connected to the scan line, and the second gate electrode is connected to a wiring to which a constant potential is supplied.