摘要:
A method and system for allowing communication devices to synchronously manage shared information are provided. A sender sends single-photon pulses modulated with original random numbers to a receiver and also sends frame pulses by using ordinary optical pulses. Bit comparison and basis reconciliation are performed by the frame which is defined by the frame pulses, whereby sifted keys, which are aggregated as a file, are generated by the sender and the receiver individually. The sifted keys are subjected to error correction, privacy amplification, and file sharing processing by the file, whereby common cryptographic keys are synchronously stored in the sender and the receiver individually. The generated cryptographic keys are managed as encryption keys and decryption keys separately. A newly generated key is preferentially placed in the encryption keys or decryption keys that have a smaller stored amount.
摘要:
A random number quality control circuit capable of fast control of the level of random number quality is present. When a “0” output section and a “1” output section generate random numbers by individually receiving a random number signal, a random number quality monitor monitors an unbalance between the numbers of “0”s and “1”s. If a deviation from a desired ratio is found, a drive controller controls the reception characteristics of the “0” output section and “1” output section individually so that the deviation will be compensated for. The amount of information intercepted between a sender and a receiver can be reduced by maintaining the mark ratio of shared random numbers at 50%.
摘要:
A secret communications system realizes point-to-multipoint or multipoint-to-multipoint connections of both quantum channels and classical channels. Multiple remote nodes are individually connected to a center node through optical fiber, and random-number strings K1 to KN are individually generated and shared between the respective remote nodes and the center node. Encrypted communication is performed between each remote node and the center node by using the corresponding one of the shared random-number strings K1 to KN as a cryptographic key. The center node is provided with a switch section for quantum channels and a switch section for classical channels. Switching control on each of these switch sections is performed independently of the other by a controller.
摘要:
A user request can be reflected in the degree of security of an updated key in quantum key distribution. A sender and a receiver are connected through optical fiber. A quantum transmitter in the sender and a quantum receiver in the receiver carry out basis reconciliation and error correction through a quantum channel, based on a source of a key sent from the quantum transmitter and on a raw key received by the quantum receiver. Under the control of security control sections in the sender and receiver, the amount of information with the possibility of being intercepted that is determined in accordance with a degree of security requested by a user, is removed from the key information after error correction, whereby a final cryptographic key is generated. Secret communication is performed between encryption/decryption sections in the sender and receiver by using the cryptographic key thus updated.
摘要:
For an error rate QBER, threshold values are preset, including a threshold value Qbit for frame synchronization processing, a threshold value Qphase for phase correction processing, and a threshold value QEve for eavesdropping detection. Upon the distribution of a quantum key from a sender to a receiver, when the measurement value of QBER is deteriorated more than Qbit, frame synchronization processing is performed. When the measurement value of QBER is deteriorated more than Qphase, phase correction processing and frame synchronization processing are performed. When QBER does not become better than QEve even after these recovery-processing steps are repeated N times, it is determined that there is a possibility of eavesdropping, and the processing is stopped.
摘要:
An address translator capable of reducing system loads in address translation and an overhead in switching between operating systems. A plurality of address translation buffers classifies and stores virtual addresses and real addresses based on a plurality of operating systems which is run by a processor. For example, the address translation buffers store the virtual addresses and the real addresses in correspondence with the operating systems. According to a running operating system, an address translation controller accesses a corresponding address translation buffer to translate virtual addresses to real addresses.
摘要:
An optical packet exchange apparatus and an optical switch in which search for a connection pattern between an input unit devoid of a packet to be transmitted and an output unit devoid of a packet to be received is reduced to enable fast switch control even in cases wherein the number of channels of the exchange apparatus is increased or network speed is higher. A plurality of input units, a plurality of output units and an optical switch are provided. Each input unit includes an input buffer unit, a parallel/serial conversion unit, an electrical/optical conversion unit, and a dummy packet insertion unit for sending a dummy packet if there is no packet to be transmitted. Each output unit includes an exchange counterpart contention resolution unit for controlling the exchange counterpart, an optical/electrical conversion unit, a serial/parallel conversion unit, and a packet eliminating unit. The exchange counterpart contention resolution unit controls the packet eliminating unit to eliminate a dummy packet.
摘要:
An optical packet exchange apparatus and an optical switch in which search for a connection pattern between an input unit devoid of a packet to be transmitted and an output unit devoid of a packet to be received is reduced to enable fast switch control even in cases wherein the number of channels of the exchange apparatus is increased or network speed is higher. A plurality of input units, a plurality of output units and an optical switch are provided. Each input unit includes an input buffer unit, a parallel/serial conversion unit, an electrical/optical conversion unit, and a dummy packet insertion unit for sending a dummy packet if there is no packet to be transmitted. Each output unit includes an exchange counterpart contention resolution unit for controlling the exchange counterpart, an optical/electrical conversion unit, a serial/parallel conversion unit, and a packet eliminating unit. The exchange counterpart contention resolution unit controls the packet eliminating unit to eliminate a dummy packet.
摘要:
The first present invention provides an optical switch including the following elements. At least a plurality of optical transmission lines are provided for transmissions of optical signals. Each of the at least plurality of optical transmission lines have a least an impurity doped fiber. At least an excitation light source is provided for emitting an excitation light. At least an excitation light switch is provided which is connected to the excitation light source and also connected to the at least plurality of optical transmission lines for individual switching operations to supply the excitation light to the at least plurality of optical transmission lines to feed the excitation light to the impurity doped fiber on the at least plurality of optical transmission lines, thereby causing an excitation of the impurity doped fiber on selected one of the at least plurality of optical transmission lines so as to permit a transmission of the optical signal through the excited impurity doped fiber, whilst unselected one of the impurity doped fibers is unexcited whereby the optical signals are absorbed into the unselected one of the impurity doped fibers thereby to discontinue an transmission of the optical signal by the unselected one of the impurity doped fibers.
摘要:
A bit synchronization circuit operates at high speed range as high as Gb/s or higher and can establish synchronization within 10 bits with rejecting jitter to permit accurate bit synchronization. The bit synchronization circuit thus generates a plurality of clocks having mutually different phases in synchronism with an input reference clock. A phase relationship between a plurality of clocks and an input data to be decided is discriminated by a phase comparator circuit. The clock having optimal phase relationship, namely clock having level transition timing having at a substantially center portion of mutually adjacent level transition timing of the input data, is determined by a phase determination circuit. An decision circuit and selector are provided for deciding input data at the level transition timing of the determined clock.