公开(公告)号：US20230282247A1

公开(公告)日：2023-09-07

申请号：US18316743

申请日：2023-05-12

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chieh Lee ,  Yi-Ching Liu ,  Chia-En Huang ,  Jen-Yuan Chang ,  Yih Wang

IPC分类号： G11C5/06 ,  G11C5/02 ,  H01L23/48 ,  H10B12/00 ,  H10B61/00 ,  H10B63/00 ,  H10N50/01 ,  H10N50/80 ,  H10N70/00

CPC分类号： G11C5/06 ,  G11C5/025 ,  H01L23/481 ,  H10B12/00 ,  H10B61/00 ,  H10B63/84 ,  H10N50/01 ,  H10N50/80 ,  H10N70/011 ,  H10N70/821

摘要： A memory device includes a first layer, wherein the first layer includes a first memory array, a first row decoder circuit, and a first column sensing circuit. The memory device includes a second layer disposed with respect to the first layer in a vertical direction. The second layer includes a first peripheral circuit operatively coupled to the first memory array, the first row decoder circuit, and the first column sensing circuit. The memory device includes a plurality of interconnect structures extending along the vertical direction. At least a first one of the plurality of interconnect structures operatively couples the second layer to the first layer.

公开(公告)号：US20230010825A1

公开(公告)日：2023-01-12

申请号：US17862267

申请日：2022-07-11

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Fu-Chiang Kuo ,  Jen-Yuan Chang

IPC分类号： H01L23/64 ,  H01L25/065 ,  H01L23/498

摘要： A semiconductor structure comprises a semiconductor substrate, a first trench capacitor, and a second trench capacitor. The substrate has first trenches arranged in a first arrangement direction with each first trench extending in a first extension direction and second trenches arranged in a second arrangement direction with each second trench extending in a second extension direction. The first trench capacitor includes first capacitor segments disposed inside the first trenches. The second trench capacitor includes second capacitor segments disposed inside the second trenches. One first capacitor segment of the first capacitor segments has an extending length different from that of another first capacitor segment of the first capacitor segments, and one second capacitor segment of the second capacitor segments has an extending length different from that of another second capacitor segment of the second capacitor segments.

公开(公告)号：US11437332B2

公开(公告)日：2022-09-06

申请号：US17085230

申请日：2020-10-30

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

发明人： Jen-Yuan Chang ,  Chia-Ping Lai

IPC分类号： H01L23/538 ,  H01L23/00

摘要： A package structure and method of manufacturing a package structure are provided. The package structure comprises two semiconductor structures and two bonding layers sandwiched between both semiconductor structures. Each bonding layer has a plurality of bonding pads separated by an isolation layer. Each bonding pad has a bonding surface including a bonding region and at least one buffer region. The bonding regions in both bonding layers bond to each other. The buffer region of one semiconductor structure bonds to the isolation layer of the other semiconductor structure. A ratio of a surface area of the buffer region to that of the bonding region in each metal pad is from about 0.01 to about 10.