公开(公告)号：US12080656B2

公开(公告)日：2024-09-03

申请号：US18173840

申请日：2023-02-24

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Jen-Yuan Chang

IPC分类号： H01L23/552 ,  H01L23/52

CPC分类号： H01L23/552

摘要： A semiconductor device includes an inductance structure and a shielding structure. The shielding structure is arranged to at least partially shield the inductance structure from external electromagnetic fields. The shielding structure includes a shielding structure portion arranged along a side of the inductance structure such that the shielding structure portion is around at least a portion of a perimeter of the inductance structure.

公开(公告)号：US12033959B2

公开(公告)日：2024-07-09

申请号：US17546003

申请日：2021-12-08

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Jen-Yuan Chang

IPC分类号： H01L23/00 ,  H01L25/00 ,  H01L25/065

CPC分类号： H01L23/562 ,  H01L24/08 ,  H01L24/80 ,  H01L25/0652 ,  H01L25/50 ,  H01L2224/08145 ,  H01L2224/80895 ,  H01L2224/80896

摘要： A device includes a substrate, at least one first dielectric layer on the substrate and including a first dielectric constant, at least one second dielectric layer on the at least one first dielectric layer and including a second dielectric constant greater than the first dielectric constant, and a dummy pattern including a first conductive pattern having a first pattern density in the at least one first dielectric layer and a second conductive pattern in the at least one second dielectric layer and comprising a second pattern density. The first pattern density is equal to or greater than the second pattern density.

公开(公告)号：US12021069B2

公开(公告)日：2024-06-25

申请号：US17081783

申请日：2020-10-27

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

发明人： Jen-Yuan Chang ,  Chia-Ping Lai

IPC分类号： H01L25/16 ,  H01L31/02 ,  H01L31/0216 ,  H01L31/0232 ,  H01L31/18

CPC分类号： H01L25/167 ,  H01L31/02005 ,  H01L31/02164 ,  H01L31/02327 ,  H01L31/18

摘要： The semiconductor structure includes a die, a dielectric layer surrounding the die, a photoelectric device disposed adjacent to the die and surrounded by the dielectric layer, a first opening extending through the redistribution layer and configured to receive a light-conducting member, and a dielectric liner extending at least partially through the redistribution layer and surrounding the first opening. A method for forming a semiconductor structure includes forming a dielectric layer to surround a die; and disposing a photoelectric device surrounded by the dielectric layer; forming a redistribution layer over the die, the dielectric layer and the photoelectric device; forming a recess over the photoelectric device; disposing a dielectric material into the recess; removing a portion of the dielectric material to form a dielectric liner and a first opening over the photoelectric device. The dielectric liner extends at least partially through the redistribution layer and surrounding the first opening.

公开(公告)号：US20240006374A1

公开(公告)日：2024-01-04

申请号：US17810606

申请日：2022-07-03

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Jen-Yuan Chang

IPC分类号： H01L25/065 ,  H01L23/00 ,  H01L23/538 ,  H01L25/00

CPC分类号： H01L25/0652 ,  H01L24/16 ,  H01L24/08 ,  H01L23/5381 ,  H01L24/80 ,  H01L23/5386 ,  H01L25/50 ,  H01L2924/10156 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2224/16225 ,  H01L2224/16145 ,  H01L2224/08145 ,  H01L2924/15331

摘要： A semiconductor die assembly is provided. The semiconductor die assembly includes: a first bottom die and a second bottom die disposed at a bottom vertical level; a first top die disposed at a top vertical level above the bottom vertical level in a vertical direction and bonded to the first bottom die; a second top die disposed at the top vertical level and bonded to the second bottom die; and a linking die disposed at the top vertical level and bonded to both the first bottom die and the second bottom die. The linking die is characterized by a polygonal shape in a horizontal plane perpendicular to the vertical direction, and the polygonal shape is not a rectangle.

公开(公告)号：US20230290694A1

公开(公告)日：2023-09-14

申请号：US17693439

申请日：2022-03-14

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Tse-Pan Yang ,  Wei Lee ,  Kuo-Pei Lu ,  Jen-Yuan Chang

IPC分类号： H01L21/66 ,  H01L23/48 ,  H01L23/498 ,  H01L49/02 ,  G01R31/28

CPC分类号： H01L22/30 ,  H01L23/481 ,  H01L23/49822 ,  H01L28/20 ,  G01R31/2884

摘要： A test key configured to measure resistance of a through semiconductor via in a semiconductor substrate is provided. The test key includes a first resistor, a first conductor, a first probe pad, a second conductor, a second probe pad, a third conductor, a third probe pad, a fourth conductor, and a fourth probe pad. The first probe pad is electrically connected to a first end of the through semiconductor via by the first resistor and the first conductor. The second probe pad is electrically connected to the first end of the through semiconductor via by the second conductor. The third probe pad is electrically connected to a second end of the through semiconductor via by the third conductor. The fourth probe pad is electrically connected to the second end of the through semiconductor via by the fourth conductor.

公开(公告)号：US20230140683A1

公开(公告)日：2023-05-04

申请号：US17652485

申请日：2022-02-25

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Jen-Yuan Chang

IPC分类号： H01L23/532 ,  H01L23/522 ,  H01L21/321 ,  H01L21/768 ,  H01L23/00

摘要： A semiconductor package includes: a first die, a second die and a bonding member arranged between the first and second die, wherein the bonding member is configured to facilitate a bonding between the first and second die and comprises a first area and a second area. The first area is configured with a first set of bonding pads configured to provide electrical connections between the first and second dies. The second area is configured with a second set of bonding pads configured to provide electrical connections between the first and second die, wherein a quantity of bonding pads in the first set is larger than a quantity of bonding pads in the second set. The second area is configured with a dummy structure in one or more spaces where a bonding pad is not present in the second area, the dummy structure not providing an electrical connection.

公开(公告)号：US20230052136A1

公开(公告)日：2023-02-16

申请号：US17834289

申请日：2022-06-07

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Jen-Yuan Chang ,  Jheng-Hong Jiang ,  Chin-Chou Liu ,  Long Song Lin

IPC分类号： H01L29/06 ,  H01L29/78 ,  H01L29/10

摘要： An integrated circuit (IC) device includes a chip having a semiconductor substrate and a thermoelectric module embedded in the semiconductor substrate, where the thermoelectric module includes a first semiconductor structure electrically connected to a second semiconductor structure, where a bottom portion of thermoelectric module extends through a thickness of the semiconductor substrate, and where the first semiconductor structure and the second semiconductor structure include dopants of different conductivity types.

公开(公告)号：US20220415757A1

公开(公告)日：2022-12-29

申请号：US17666469

申请日：2022-02-07

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Jen-Yuan Chang

IPC分类号： H01L23/48 ,  H01L25/065

摘要： A semiconductor device is disclosed. The semiconductor device includes a first substrate. The first substrate includes a first dielectric layer, and a vertical conductive area, where the vertical conductive area includes one or more vertical conductive structures extending through the first dielectric layer, where each line segment of a non-square quadrilateral contacts at least one of the one or more vertical conductive structures. The vertical conductive area also includes a continuous conductive guard ring structure in the first dielectric layer, where the continuous conductive guard ring structure surrounds the one or more vertical conductive structures. The semiconductor device also includes a second substrate, including a first conductor, and a second conductor, where the first conductor of the second substrate is electrically connected to at least one of the vertical conductive structures of the first substrate.

公开(公告)号：US11521893B2

公开(公告)日：2022-12-06

申请号：US17085327

申请日：2020-10-30

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

发明人： Jen-Yuan Chang

IPC分类号： H01L27/11556 ,  H01L21/768 ,  H01L21/306 ,  H01L21/56 ,  H01L23/00

摘要： A semiconductor structure includes a first die, a second die over the first die, and a positioning member disposed within a bonding dielectric and configured to align the second die with the first die. A method for forming a semiconductor structure includes receiving a first die having a first bonding layer; forming a recess on the first bonding layer; forming a positioning member on a second die; bonding the second die over the first die using the first bonding layer; and disposing the positioning member into the recess.

公开(公告)号：US11495536B2

公开(公告)日：2022-11-08

申请号：US17103650

申请日：2020-11-24

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

发明人： Jen-Yuan Chang ,  Chia-Ping Lai

IPC分类号： H01L23/52 ,  H01L23/525 ,  H01L23/48 ,  H01L23/522 ,  H01L23/528 ,  H01L23/00 ,  H01L23/58

摘要： A semiconductor structure and a method for forming the semiconductor structure are disclosed. The method includes receiving a first integrated circuit component having a seal ring and a fuse structure, wherein the fuse structure is electrically connected to a ground through the seal ring; receiving a second integrated circuit component having a first capacitor; bonding the second integrated circuit component to the first integrated circuit component; electrically connecting the first capacitor to the fuse structure, wherein the first capacitor is electrically connected to the ground through the fuse structure; and blowing the fuse structure after a treatment.