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    Package structure and manufacturing method thereof
    51.
    发明授权
    Package structure and manufacturing method thereof 有权

    公开(公告)号：US11355418B2

    公开(公告)日：2022-06-07

    申请号：US16921916

    申请日：2020-07-06

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Chen-Hua Yu ,  Chun-Hui Yu ,  Jeng-Nan Hung ,  Kuo-Chung Yee

    IPC: H01L23/42 ,  H01L25/065 ,  H01L23/00 ,  H01L23/522 ,  H01L23/528 ,  H01L23/31

    Abstract: A package structure includes a wafer-form semiconductor package and a thermal dissipating system. The wafer-form semiconductor package includes semiconductor dies electrically connected with each other. The thermal dissipating system is located on and thermally coupled to the wafer-form semiconductor package, where the thermal dissipating system has a hollow structure with a fluidic space, and the fluidic space includes a ceiling and a floor. The thermal dissipating system includes at least one inlet opening, at least one outlet opening and a plurality of first microstructures. The at least one inlet opening and the at least one outlet opening are spatially communicated with the fluidic space. The first microstructures are located on the floor, and at least one of the first microstructures is corresponding to the at least one outlet opening.

    Semiconductor device
    52.
    发明授权
    Semiconductor device 有权

    公开(公告)号：US11328975B2

    公开(公告)日：2022-05-10

    申请号：US16942750

    申请日：2020-07-29

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Chen-Hua Yu ,  Chun-Hui Yu ,  Jeng-Nan Hung ,  Kuo-Chung Yee ,  Po-Fan Lin

    IPC: H01L23/36 ,  H01L23/04 ,  H05K7/20

    Abstract: A semiconductor device including a substrate, a semiconductor package, a plurality of pillars and a lid is provided. The semiconductor package is disposed on the substrate and includes at least one semiconductor die. The plurality of pillars are disposed on the semiconductor package. The lid is disposed on the substrate and covers the semiconductor package and the plurality of pillars. The lid includes an inflow channel and an outflow channel to allow a coolant to flow into and out of a space between the substrate, the semiconductor package, the plurality of pillars and the lid. An inner surface of the lid, which faces and overlaps the plurality of pillars along a stacking direction of the semiconductor package and the lid, is a flat surface.

    SEMICONDUCTOR STRUCTURE
    54.
    发明申请
    SEMICONDUCTOR STRUCTURE 有权

    公开(公告)号：US20210159201A1

    公开(公告)日：2021-05-27

    申请号：US16935175

    申请日：2020-07-21

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Chen-Hua Yu ,  Chun-Hui Yu ,  Jeng-Nan Hung ,  Kuo-Chung Yee ,  Po-Fan Lin

    IPC: H01L23/00 ,  H01L23/48

    Abstract: A structure including a first semiconductor die and a second semiconductor die is provided. The first semiconductor die includes a first bonding structure. The first bonding structure includes a first dielectric layer and first conductors embedded in the first dielectric layer. The second semiconductor die includes a second bonding structure. The second bonding structure includes a second dielectric layer and second conductors embedded in the second dielectric layer. The first dielectric layer is in contact with the second dielectric layer, and the first conductors are in contact with the second conductors. Thermal conductivity of the first dielectric layer and the second dielectric layer is greater than thermal conductivity of silicon dioxide.

    SEMICONDUCTOR STRUCTURE AND METHOD MANUFACTURING THE SAME
    55.
    发明申请
    SEMICONDUCTOR STRUCTURE AND METHOD MANUFACTURING THE SAME 有权

    公开(公告)号：US20210098381A1

    公开(公告)日：2021-04-01

    申请号：US16852567

    申请日：2020-04-20

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Chen-Hua Yu ,  Kuo-Chung Yee

    IPC: H01L23/538 ,  H01L23/498 ,  H01L21/48 ,  H01L21/56

    Abstract: A semiconductor structure includes system-on-integrated chips, a first redistribution circuit structure and first conductive terminals. The system-on-integrated chips each include a die stack having two or more than two tiers, and each tier includes at least one semiconductor die. The first redistribution circuit structure is located on and electrically connected to the system-on-integrated chips. The first conductive terminals are connected on the first redistribution circuit structure, where the first redistribution circuit structure is located between the system-on-integrated chips and the first conductive terminals.

    SEMICONDCUTOR PACKAGES
    56.
    发明申请
    SEMICONDCUTOR PACKAGES 有权

    公开(公告)号：US20210066279A1

    公开(公告)日：2021-03-04

    申请号：US16888874

    申请日：2020-06-01

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Chen-Hua Yu ,  Chun-Hui Yu ,  Kuo-Chung Yee ,  Liang-Ju Yen

    IPC: H01L25/18 ,  H01L23/31 ,  H01L23/367 ,  H01L23/538 ,  H01L25/00

    Abstract: One of semiconductor packages includes a substrate and a package structure. The package structure is bonded to the substrate and includes a first redistribution layer structure, a first logic die, a plurality of second logic dies, a first memory die, a first heat conduction block and a first encapsulant. The first logic die and the second logic dies are disposed over and electrically connected to the first redistribution layer structure. The first memory die is disposed over the first logic die and the second logic dies and electrically connected to first redistribution layer structure. The first heat conduction block is disposed over the first logic die and the second logic dies. The first encapsulant encapsulates the first memory die and the first heat conduction block.

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