公开(公告)号：US11574853B2

公开(公告)日：2023-02-07

申请号：US16916115

申请日：2020-06-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chen-Hua Yu ,  Chun-Hui Yu ,  Jeng-Nan Hung ,  Kuo-Chung Yee ,  Po-Fan Lin

IPC: H01L23/46 ,  H01L23/367 ,  H01L23/433 ,  H01L23/31 ,  H01L23/00

Abstract: A semiconductor device including a substrate, a semiconductor package, a thermal conductive bonding layer, and a lid is provided. The semiconductor package is disposed on the substrate. The thermal conductive bonding layer is disposed on the semiconductor package. The lid is attached to the thermal conductive bonding layer and covers the semiconductor package to prevent coolant from contacting the semiconductor package.

公开(公告)号：US20210159139A1

公开(公告)日：2021-05-27

申请号：US16942750

申请日：2020-07-29

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chen-Hua Yu ,  Chun-Hui Yu ,  Jeng-Nan Hung ,  Kuo-Chung Yee ,  Po-Fan Lin

IPC: H01L23/36 ,  H01L23/04 ,  H05K7/20

Abstract: A semiconductor device including a substrate, a semiconductor package, a plurality of pillars and a lid is provided. The semiconductor package is disposed on the substrate and includes at least one semiconductor die. The plurality of pillars are disposed on the semiconductor package. The lid is disposed on the substrate and covers the semiconductor package and the plurality of pillars. The lid includes an inflow channel and an outflow channel to allow a coolant to flow into and out of a space between the substrate, the semiconductor package, the plurality of pillars and the lid. An inner surface of the lid, which faces and overlaps the plurality of pillars along a stacking direction of the semiconductor package and the lid, is a flat surface.

公开(公告)号：US11139223B2

公开(公告)日：2021-10-05

申请号：US16655257

申请日：2019-10-17

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chen-Hua Yu ,  Chun-Hui Yu ,  Jeng-Nan Hung ,  Kuo-Chung Yee

IPC: H01L23/34 ,  H01L23/473 ,  H01L25/065 ,  H01L25/18 ,  H01L23/31 ,  H01L21/50 ,  H01L21/308

Abstract: A semiconductor package includes a semiconductor package, a cap, a seal, and microstructures. The semiconductor package includes at least one semiconductor die. The cap is disposed over an upper surface of the semiconductor package. The seal is located on the semiconductor package and between the cap and the semiconductor package. The cap includes an inflow channel and an outflow channel. The active surface of the at least one semiconductor die faces away from the cap. The cap and an upper surface of the semiconductor package define a circulation recess providing fluidic communication between the inflow channel and the outflow channel. The seal is disposed around the circulation recess. The microstructures are located within the circulation recess, and the microstructures are connected to at least one of the cap and the at least one semiconductor die.

公开(公告)号：US11380645B2

公开(公告)日：2022-07-05

申请号：US16935175

申请日：2020-07-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chen-Hua Yu ,  Chun-Hui Yu ,  Jeng-Nan Hung ,  Kuo-Chung Yee ,  Po-Fan Lin

IPC: H01L23/00 ,  H01L23/48

Abstract: A structure including a first semiconductor die and a second semiconductor die is provided. The first semiconductor die includes a first bonding structure. The first bonding structure includes a first dielectric layer and first conductors embedded in the first dielectric layer. The second semiconductor die includes a second bonding structure. The second bonding structure includes a second dielectric layer and second conductors embedded in the second dielectric layer. The first dielectric layer is in contact with the second dielectric layer, and the first conductors are in contact with the second conductors. Thermal conductivity of the first dielectric layer and the second dielectric layer is greater than thermal conductivity of silicon dioxide.

公开(公告)号：US20210098335A1

公开(公告)日：2021-04-01

申请号：US16921916

申请日：2020-07-06

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chen-Hua Yu ,  Chun-Hui Yu ,  Jeng-Nan Hung ,  Kuo-Chung Yee

IPC: H01L23/42 ,  H01L25/065 ,  H01L23/00 ,  H01L23/31 ,  H01L23/522 ,  H01L23/528

Abstract: A package structure includes a wafer-form semiconductor package and a thermal dissipating system. The wafer-form semiconductor package includes semiconductor dies electrically connected with each other. The thermal dissipating system is located on and thermally coupled to the wafer-form semiconductor package, where the thermal dissipating system has a hollow structure with a fluidic space, and the fluidic space includes a ceiling and a floor. The thermal dissipating system includes at least one inlet opening, at least one outlet opening and a plurality of first microstructures. The at least one inlet opening and the at least one outlet opening are spatially communicated with the fluidic space. The first microstructures are located on the floor, and at least one of the first microstructures is corresponding to the at least one outlet opening.

公开(公告)号：US20240038718A1

公开(公告)日：2024-02-01

申请号：US17815088

申请日：2022-07-26

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Jeng-Nan Hung ,  Chih-Hang Tung ,  Chen-Hua Yu

IPC: H01L23/00 ,  H01L23/48 ,  H01L21/768 ,  H01L25/065

CPC classification number: H01L24/80 ,  H01L24/08 ,  H01L23/481 ,  H01L21/76898 ,  H01L25/0657 ,  H01L25/0652 ,  H01L24/96 ,  H01L24/97 ,  H01L24/94 ,  H01L21/561

Abstract: A method includes directly bonding a first wafer to a second wafer, wherein the bonding electrically connects a first interconnect structure of the first wafer to a second interconnect structure of the second wafer; directly bonding first semiconductor devices to the second wafer, wherein the bonding electrically connects the first semiconductor devices to the second interconnect structure; encapsulating the first semiconductor devices with a first encapsulant; and forming solder bumps over the first semiconductor devices.

公开(公告)号：US20210407887A1

公开(公告)日：2021-12-30

申请号：US16916115

申请日：2020-06-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chen-Hua Yu ,  Chun-Hui Yu ,  Jeng-Nan Hung ,  Kuo-Chung Yee ,  Po-Fan Lin

IPC: H01L23/46 ,  H01L23/367 ,  H01L23/433 ,  H01L23/31 ,  H01L23/00

Abstract: A semiconductor device including a substrate, a semiconductor package, a thermal conductive bonding layer, and a lid is provided. The semiconductor package is disposed on the substrate. The thermal conductive bonding layer is disposed on the semiconductor package. The lid is attached to the thermal conductive bonding layer and covers the semiconductor package to prevent coolant from contacting the semiconductor package.

公开(公告)号：US20200176357A1

公开(公告)日：2020-06-04

申请号：US16655257

申请日：2019-10-17

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chen-Hua Yu ,  Chun-Hui Yu ,  Jeng-Nan Hung ,  Kuo-Chung Yee

IPC: H01L23/473 ,  H01L25/065 ,  H01L25/18 ,  H01L23/31 ,  H01L21/50

Abstract: A semiconductor package includes a semiconductor package, a cap, a seal, and microstructures. The semiconductor package includes at least one semiconductor die. The cap is disposed over an upper surface of the semiconductor package. The seal is located on the semiconductor package and between the cap and the semiconductor package. The cap includes an inflow channel and an outflow channel. The active surface of the at least one semiconductor die faces away from the cap. The cap and an upper surface of the semiconductor package define a circulation recess providing fluidic communication between the inflow channel and the outflow channel. The seal is disposed around the circulation recess. The microstructures are located within the circulation recess, and the microstructures are connected to at least one of the cap and the at least one semiconductor die.

公开(公告)号：US11355418B2

公开(公告)日：2022-06-07

申请号：US16921916

申请日：2020-07-06

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chen-Hua Yu ,  Chun-Hui Yu ,  Jeng-Nan Hung ,  Kuo-Chung Yee

IPC: H01L23/42 ,  H01L25/065 ,  H01L23/00 ,  H01L23/522 ,  H01L23/528 ,  H01L23/31

Abstract: A package structure includes a wafer-form semiconductor package and a thermal dissipating system. The wafer-form semiconductor package includes semiconductor dies electrically connected with each other. The thermal dissipating system is located on and thermally coupled to the wafer-form semiconductor package, where the thermal dissipating system has a hollow structure with a fluidic space, and the fluidic space includes a ceiling and a floor. The thermal dissipating system includes at least one inlet opening, at least one outlet opening and a plurality of first microstructures. The at least one inlet opening and the at least one outlet opening are spatially communicated with the fluidic space. The first microstructures are located on the floor, and at least one of the first microstructures is corresponding to the at least one outlet opening.

公开(公告)号：US11328975B2

公开(公告)日：2022-05-10

申请号：US16942750

申请日：2020-07-29

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chen-Hua Yu ,  Chun-Hui Yu ,  Jeng-Nan Hung ,  Kuo-Chung Yee ,  Po-Fan Lin

IPC: H01L23/36 ,  H01L23/04 ,  H05K7/20

Abstract: A semiconductor device including a substrate, a semiconductor package, a plurality of pillars and a lid is provided. The semiconductor package is disposed on the substrate and includes at least one semiconductor die. The plurality of pillars are disposed on the semiconductor package. The lid is disposed on the substrate and covers the semiconductor package and the plurality of pillars. The lid includes an inflow channel and an outflow channel to allow a coolant to flow into and out of a space between the substrate, the semiconductor package, the plurality of pillars and the lid. An inner surface of the lid, which faces and overlaps the plurality of pillars along a stacking direction of the semiconductor package and the lid, is a flat surface.