公开(公告)号：US20060034409A1

公开(公告)日：2006-02-16

申请号：US10523209

申请日：2003-07-25

申请人： Takashi Aoyama ,  Hiroshi Miyagi

发明人： Takashi Aoyama ,  Hiroshi Miyagi

IPC分类号： H03D3/24

CPC分类号： H03L7/0992 ,  H03L7/18

摘要： A digital VCO includes an A/D converter (11) for converting a given analog signal to a digital signal, a quartz oscillation circuit (12) having a quartz oscillator for generating a signal having a predetermined frequency, and a variable divider circuit (13) for varying the division ratio according to the digital signal and divides the frequency of the signal generated by the quartz oscillation circuit (12) according to the division ratio.

摘要翻译： 数字VCO包括用于将给定模拟信号转换为数字信号的A / D转换器（11），具有用于产生具有预定频率的信号的石英振荡器的石英振荡电路（12）和可变分频电路（13） ），用于根据数字信号改变分频比，并根据分频比对由石英振荡电路（12）产生的信号的频率进行分频。

公开(公告)号：US20060013404A1

公开(公告)日：2006-01-19

申请号：US10524792

申请日：2003-08-21

申请人： Tsuyoshi Koike ,  Hiroshi Miyagi

发明人： Tsuyoshi Koike ,  Hiroshi Miyagi

IPC分类号： H04H5/00

CPC分类号： H04H40/72 ,  H04B1/1676

摘要： A stereo demodulator circuit comprising at least one noise control unit for performing a noise control responding to an RSSI (reception electric-field intensity) when the RSSI is within a specified range, further comprises an AD converter unit for AD-converting a signal corresponding to the RSSI and a control signal producing unit for producing a control signal for a noise control performed in the noise control unit according to a noise level when the noise level obtained by the AD conversion is within the above described specified range. The control signal producing unit comprises an offset unit for digitally offsetting a signal obtained through the above described AD conversion by a predefined value and truncating lower bits off the offset value by the number of bits in compliance with a grade of the noise control accuracy and outputs the control signal based on the signal obtained from the offset unit.

摘要翻译： 一种立体声解调器电路，包括至少一个噪声控制单元，用于当RSSI在指定范围内时响应于RSSI（接收电场强度）执行噪声控制，还包括AD转换单元，用于AD转换对应于 RSSI和控制信号产生单元，用于当通过AD转换获得的噪声电平在上述指定范围内时，根据噪声电平产生用于在噪声控制单元中执行的噪声控制的控制信号。 控制信号产生单元包括：偏移单元，用于通过预定义的值将通过上述AD转换获得的信号数字偏移，并根据噪声控制精度等级将偏移值的低位截断位数 基于从偏移单元获得的信号的控制信号。

公开(公告)号：US20050266815A1

公开(公告)日：2005-12-01

申请号：US10519970

申请日：2003-06-27

申请人： Hiroshi Miyagi

发明人： Hiroshi Miyagi

IPC分类号： H03G1/00 ,  H03G3/30 ,  H04B1/16 ,  H04B1/06 ,  H03F3/45 ,  H04B7/00

CPC分类号： H03G3/3052 ,  H03F2203/45408 ,  H03G1/0029 ,  H03G1/007

摘要： The AGC circuit that is provided in an RF receiver is equipped with the detection circuit that detects a high frequency reception signal and outputs the detection signal including a pulsating component and implements the gain control on an RF amplification circuit according to the detection output. The amplifier (DC amplifier) that is connected immediately after the detection circuit is configured to be deteriorated in its high frequency property or a unit that deteriorates the high frequency property is connected to the amplifier. According to such a configuration, the pulsating component that is overlapped with the detection output is removed as much as possible.

摘要翻译： 设置在RF接收机中的AGC电路配备有检测高频接收信号的检测电路，并输出包括脉动分量的检测信号，并根据检测输出对RF放大电路实现增益控制。 连接在检测电路之后的放大器（DC放大器）被配置为在其高频特性中劣化，或者使高频特性恶化的单元连接到放大器。 根据这样的结构，尽可能地去除与检测输出重叠的脉动成分。

公开(公告)号：US20050242894A1

公开(公告)日：2005-11-03

申请号：US10525983

申请日：2003-08-22

申请人： Isami Kato ,  Hiroshi Miyagi

发明人： Isami Kato ,  Hiroshi Miyagi

IPC分类号： H03B1/00 ,  H03B5/02 ,  H03B5/08 ,  H03B5/12 ,  H03L7/08 ,  H03L7/099 ,  H03L7/18 ,  H04B1/26

CPC分类号： H03L7/099 ,  H03L7/18

摘要： The oscillating unit 11 generates a signal having a frequency of n*f, i.e., n times a target frequency f. The control voltage generation circuit 21 compares the phase difference between a divided signal of a signal generated in the oscillating unit 11 and the reference signal, and outputs a DC control voltage according to the phase difference to the oscillating unit 11, thereby controlling an oscillation frequency. The divider circuit 22 converts a signal generated in the oscillating unit 11 to the target frequency f, by dividing the aforementioned signal into n equal units. By setting the oscillation frequency of the oscillating unit at n times the target frequency, the inductance and the capacitors can be formed on a semiconductor integrated circuit board.

摘要翻译： 振荡单元11产生频率为n * f的信号，即n个目标频率f的信号。 控制电压产生电路21比较在振荡单元11中产生的信号的分频信号与参考信号之间的相位差，并将相位差的DC控制电压输出到振荡单元11，由此控制振荡频率 。 分频器电路22通过将上述信号除以n等于单位将在振荡单元11中产生的信号转换为目标频率f。 通过将振荡单元的振荡频率设定为目标频率的n倍，电感和电容器可以形成在半导体集成电路板上。

公开(公告)号：US20050083154A1

公开(公告)日：2005-04-21

申请号：US10494655

申请日：2002-11-12

申请人： Hiroshi Miyagi

发明人： Hiroshi Miyagi

IPC分类号： H03J1/00 ,  H03J3/18 ,  H03J3/20 ,  H03J3/06

CPC分类号： H03J3/20 ,  H03J1/0033 ,  H03J3/185

摘要： A receiver capable of reducing the number of pads of a semiconductor device used for connection with a tuning circuit. The receiver includes a semiconductor device 100 containing various circuits and a tuning circuit 130 connected as a separate part to this semiconductor device 100. The semiconductor device 100 has a pad 112 formed on a semiconductor substrate 110, a processing circuit 114 connected via a capacitor 120 to the pad 112, and aD/A converter 122 connected via a resistor 124 to the pad 112. A tuning voltage generated by the D/A converter 122 is applied via the pad 112 to the tuning circuit 130. Moreover, an output signal of the tuning circuit 130 is supplied to the pad 112 and fed via the capacitor 120 to the processing circuit 114.

摘要翻译： 一种能够减少用于与调谐电路连接的半导体器件的焊盘数量的接收器。 接收机包括：包含各种电路的半导体器件100和作为该半导体器件100的单独部分连接的调谐电路130。 半导体器件100具有形成在半导体衬底110上的焊盘112，经由电容器120连接到焊盘112的处理电路114以及经由电阻器124连接到焊盘112的D / A转换器122。 由D / A转换器122产生的调谐电压通过焊盘112施加到调谐电路130。 此外，调谐电路130的输出信号被提供给焊盘112，并经由电容器120馈送到处理电路114。

公开(公告)号：US20050074075A1

公开(公告)日：2005-04-07

申请号：US10482013

申请日：2002-06-26

申请人： Hiroshi Miyagi

发明人： Hiroshi Miyagi

IPC分类号： H04B1/16 ,  H04L27/06

CPC分类号： H04B1/1653

摘要： A feeble signal extracting circuit with a simple structure for extracting a feeble signal such as a pilot signal. A pilot signal extracting circuit 22 comprises a band elimination filter (BEF) 30, an analog subtracter 31, an amplifier 32, and a voltage comparator 33. The band elimination filter 30 removes only the frequency components at and near 19 kHz corresponding to the pilot signal and passes the other frequency components. The analog subtracter 31 receives a stereo composite signal inputted from an FM detection circuit 18 and the signal produced by removing the pilot signal from the stereo composite signal by passing the stereo composite signal through the band elimination filter 30, outputs the differential signal of the two signals, and thus extracts only the pilot signal.

摘要翻译： 一种用于提取诸如导频信号的微弱信号的简单结构的微弱信号提取电路。 导频信号提取电路22包括带除滤波器（BEF）30，模拟减法器31，放大器32和电压比较器33.带除滤波器30仅去除对应于导频的19kHz及其附近的频率分量 信号并传递其他频率分量。 模拟减法器31接收从FM检测电路18输入的立体声合成信号和通过使立体声复合信号通过带除滤波器30从立体声合成信号中去除导频信号而产生的信号，输出二者的差分信号 信号，从而仅提取导频信号。

公开(公告)号：US20100219909A1

公开(公告)日：2010-09-02

申请号：US12161653

申请日：2006-09-21

申请人： Takashi Ikeda ,  Hiroshi Miyagi

发明人： Takashi Ikeda ,  Hiroshi Miyagi

IPC分类号： H03H7/00

CPC分类号： H03G9/00 ,  H03G9/08

摘要： There are included an LPF (3) and an HPF (4) that are connected in parallel to the output of a pre-emphasis circuit (2). There is also included a gain adjusting circuit (6) that performs a gain adjustment of low-pass filter with respect to the frequency band to be passed through the HPF (4). The low frequency components of the frequency band of baseband signals outputted from the pre-emphasis circuit (2) pass through the LPF (3), while the high frequency components pass through the HPF (4). As to the outputs from the HPF (4), the gain of especially the higher part of the frequency band components to be passed through the HPF (4) is suppressed by the gain adjusting circuit (6), whereby the amplitudes of the baseband signals can be limited only for the high frequency range without using a limiter and further the peak values of the baseband signals can be inhibited from exceeding the maximum frequency deviation.

摘要翻译： 包括与预加重电路（2）的输出并联连接的LPF（3）和HPF（4）。 还包括增益调整电路（6），其对相对于通过HPF（4）的频带执行低通滤波器的增益调整。 从预加重电路（2）输出的基带信号的频带的低频分量通过LPF（3），而高频分量通过HPF（4）。 对于HPF（4）的输出，通过增益调整电路（6）抑制要通过HPF（4）的频带分量的较高部分的增益，从而基带信号的幅度 可以仅限于高频范围而不使用限制器，并且可以抑制基带信号的峰值超过最大频率偏差。

公开(公告)号：US07443240B2

公开(公告)日：2008-10-28

申请号：US10580167

申请日：2004-11-11

申请人： Hiroshi Katsunaga ,  Hiroshi Miyagi

发明人： Hiroshi Katsunaga ,  Hiroshi Miyagi

IPC分类号： H03F3/45

CPC分类号： H03G1/007 ,  H03G1/0029

摘要： It is an object of the present invention to provide a variable gain amplifier circuit operable with a low power supply voltage and with less noise generated inside the circuit. In the variable gain amplifier circuit, a third MOS transistor is connected between the respective sources of two MOS transistors constituting a differential amplifier circuit and to the gate of the third MOS transistor, and a DC bias voltage for operating the third MOS transistor in a non-saturated region is supplied. If the output voltage of an AM intermediate frequency variable gain amplifier circuit increases, a control voltage for reducing the resistance between the source and drain of the third MOS transistor is applied to reduce the gain of the AM intermediate frequency variable gain amplifier circuit.

摘要翻译： 本发明的一个目的是提供一种可变增益放大器电路，其可以以低电源电压工作并且在电路内部产生更少的噪声。 在可变增益放大器电路中，第三MOS晶体管连接在构成差分放大器电路的两个MOS晶体管的各个源极和第三MOS晶体管的栅极之间，以及用于以非非晶体管驱动第三MOS晶体管的DC偏压， 提供饱和区域。 如果AM中频可变增益放大器电路的输出电压增加，则施加用于降低第三MOS晶体管的源极和漏极之间的电阻的控制电压，以降低AM中频可变增益放大器电路的增益。

公开(公告)号：US20070170946A1

公开(公告)日：2007-07-26

申请号：US10591880

申请日：2005-02-22

申请人： Masaaki Kato ,  Hiroshi Miyagi

发明人： Masaaki Kato ,  Hiroshi Miyagi

IPC分类号： G01R31/26

CPC分类号： H04B1/1653 ,  H03F3/189 ,  H03F3/45192 ,  H03F3/45753 ,  H03F2203/45212 ,  H03F2203/45424 ,  H03F2203/45521

摘要： The purpose of the present invention is to improve a detection accuracy of a pilot signal detection circuit. A pilot detection signal voltage is input to a differential amplifier circuit 16 and a reference voltage generated by a reference signal generation circuit 17 is input to a differential amplifier circuit 19. A pilot signal is compared with the reference voltage by the differential amplifier circuits 16 and 19. Output currents of the differential amplifier circuits 16 and 19 are converted into voltages by a current-to-voltage conversion circuit 21. And an input to the current-to-voltage conversion circuit 21 is fed back with a voltage proportionate with an offset voltage of the circuit and the offset voltage of the pilot signal detection circuit is cancelled.

摘要翻译： 本发明的目的是提高导频信号检测电路的检测精度。 导频检测信号电压被输入到差分放大电路16，由参考信号发生电路17产生的参考电压被输入到差分放大电路19.导频信号与差分放大电路16和 19。 差分放大电路16和19的输出电流由电流 - 电压转换电路21转换成电压。 并且，向电流 - 电压转换电路21的输入端以与电路的偏移电压成比例的电压反馈，导频信号检测电路的偏移电压被取消。

公开(公告)号：US20060278909A1

公开(公告)日：2006-12-14

申请号：US10560706

申请日：2004-06-11

申请人： Takefumi Nishimuta ,  Hiroshi Miyagi ,  Tadahiro Ohmi ,  Shigetoshi Sugawa ,  Akinobu Teramoto

发明人： Takefumi Nishimuta ,  Hiroshi Miyagi ,  Tadahiro Ohmi ,  Shigetoshi Sugawa ,  Akinobu Teramoto

IPC分类号： H01L29/94

CPC分类号： H01L29/7851 ,  H01L21/823807 ,  H01L21/823821 ,  H01L21/82385 ,  H01L29/045

摘要： A MIS transistor, formed on a semiconductor substrate, assumed to comprise a semiconductor substrate (702, 910) comprising a projecting part (704, 910B) with at least two different crystal planes on the surface on a principal plane, a gate insulator (708, 920B) for covering at least a part of each of said at least two different crystal planes constituting the surface of the projecting part, a gate electrode (706, 930B), comprised on each of said at least two different crystal planes constituting the surface of the projecting part, which sandwiches the gate insulator with the said at least two different planes, and a single conductivity type diffusion region (710a, 710b, 910c, 910d) formed in the projecting part facing each of said at least two different crystal planes and individually formed on both sides of the gate electrode. Such a configuration allows control over increase in the element area and increase of channel width.

摘要翻译： 形成在半导体衬底上的MIS晶体管被认为包括半导体衬底（702,910），该半导体衬底包括在主平面上的表面上具有至少两个不同晶面的突出部分（704,910B），栅极绝缘体 708,920B），用于覆盖构成突出部分的表面的所述至少两个不同晶面的每一个的至少一部分;栅电极（706,930B），包括在所述至少两个不同晶面中的每一个上 构成突出部分的表面，其将栅极绝缘体与所述至少两个不同的平面夹住，并且形成在突出部分中的单个导电型扩散区域（710a，710b，910c，910d） 所述至少两个不同的晶面并且分别形成在所述栅电极的两侧。 这种配置允许控制元件面积的增加和通道宽度的增加。