公开(公告)号：US08060628B2

公开(公告)日：2011-11-15

申请号：US12492998

申请日：2009-06-26

申请人： Takeshi Yamazaki

发明人： Takeshi Yamazaki

IPC分类号： G06F15/16

CPC分类号： H04L45/00 ,  H04L41/06 ,  H04L45/22 ,  H04L45/28 ,  H04L69/14

摘要： A storage medium storing a program, in inter-application communication that is performed between a first application operating on a first node and a second application operating on a second node, for making the first node perform processes by transmitting a same packet simultaneously to all the communication paths, the processes including: a trouble monitoring session establishing process in which, whether or not a trouble monitoring session has already been established between a first communication control unit and a second communication control unit is checked; an inter-application communication session establishing process in which, a request for establishing the inter-application communication session is performed to the second application and the inter-application communication session is established; and a trouble monitoring communication process in which trouble monitoring communication is performed using only necessary information for trouble monitoring in the trouble monitoring session and at a shorter interval than an interval between retransmission processes.

摘要翻译： 一种存储介质，其存储在第一节点上操作的第一应用和在第二节点上操作的第二应用之间执行的应用间通信，以使得所述第一节点通过同时发送相同的分组来执行所有 所述处理包括：检查在第一通信控制单元和第二通信控制单元之间是否建立了故障监视会话的故障监视会话建立处理; 应用间通信会话建立处理，其中，建立对第二应用的应用间通信会话的建立请求，建立应用间通信会话; 以及故障监视通信处理，其中使用仅在故障监视会话中进行故障监视的必要信息并且以比重传处理之间的间隔更短的间隔执行故障监视通信。

公开(公告)号：US08036761B2

公开(公告)日：2011-10-11

申请号：US12311212

申请日：2007-09-27

申请人： Takashi Higuchi ,  Hirotoshi Tonou ,  Takeshi Yamazaki ,  Yu Moriyama

发明人： Takashi Higuchi ,  Hirotoshi Tonou ,  Takeshi Yamazaki ,  Yu Moriyama

IPC分类号： G05B13/02 ,  G06G7/48

CPC分类号： G05B17/02 ,  B60W2050/0031

摘要： A simulation apparatus is composed of an integrated plant model process unit 1, virtual ECUs 50A to 50C that simulate other controllers, and a simulation management unit 2 that manages the execution of an input and output process to a real ECU 300, a process by the integrated plant model process unit 1, and a process by the virtual ECUs 50A to 50C, and so on, and the simulation management unit 2 causes the integrated plant model process unit 1, the virtual ECUs 50A to 50C, and so on to execute the processes required for the operation of the real ECU 300 during a given period on the basis of the operation of the real ECU 300.

摘要翻译： 模拟装置由集成的工厂模型处理单元1，模拟其他控制器的虚拟ECU50A至50C以及管理对实际ECU 300的输入和输出处理的执行的模拟管理单元2， 综合工厂模型处理单元1和虚拟ECU50A至50C等的处理，并且模拟管理单元2使综合工厂模型处理单元1，虚拟ECU50A至50C等执行 基于真实ECU300的动作，在给定的时间内对实际的ECU300进行动作所需的处理。

公开(公告)号：US08010716B2

公开(公告)日：2011-08-30

申请号：US12858915

申请日：2010-08-18

申请人： Takeshi Yamazaki ,  Scott Douglas Clark ,  Charles Ray Johns ,  James Allan Kahle

发明人： Takeshi Yamazaki ,  Scott Douglas Clark ,  Charles Ray Johns ,  James Allan Kahle

IPC分类号： G06F3/00 ,  G06F13/00

CPC分类号： G06F12/0815 ,  G06F12/0835

摘要： Methods and apparatus provide for interconnecting one or more multiprocessors and one or more external devices through one or more configurable interface circuits, which are adapted for operation in: (i) a first mode to provide a coherent symmetric interface; or (ii) a second mode to provide a non-coherent interface.

摘要翻译： 方法和装置提供通过一个或多个可配置接口电路来互连一个或多个多处理器和一个或多个外部设备，其适于在以下操作中操作：（i）提供一致对称接口的第一模式; 或（ii）提供非相干界面的第二模式。

公开(公告)号：US08006000B2

公开(公告)日：2011-08-23

申请号：US11914170

申请日：2007-01-11

申请人： Hideyuki Saito ,  Takeshi Yamazaki ,  Yuji Takahashi ,  Hideki Mitsubayashi

发明人： Hideyuki Saito ,  Takeshi Yamazaki ,  Yuji Takahashi ,  Hideki Mitsubayashi

IPC分类号： G06F13/28 ,  G06F3/00 ,  G06F5/00 ,  G06F13/00

CPC分类号： G06F12/1475 ,  G06F12/1081

摘要： There is provided a technique of accessing a memory of a processor from a peripheral device, thereby the security is ensured while efficiency is being pursued. An address converter 14 includes an address conversion table for converting an effective address into a physical address. The address conversion table stores the effective address to which an area in a memory of a processor unit 10 is allocated to each peripheral device 30 and identification information of an access source to which access permission is given, in association with each other. When the peripheral device 30 accesses, the address converter 14 determines to permit access to the effective address under the condition that the device identification information, included in an access request packet, by which the peripheral device 30 can be uniquely identified, matches the identification information of the access source corresponding to the effective address, in the address conversion table, designated by the access request packet.

摘要翻译： 提供了从外围设备访问处理器的存储器的技术，从而在保持效率的同时确保安全性。 地址转换器14包括用于将有效地址转换为物理地址的地址转换表。 地址转换表将处理器单元10的存储器中的区域被分配给每个外围设备30的有效地址和彼此相关联地给予访问许可的访问源的标识信息。 当外围设备30访问时，地址转换器14在允许外部设备30被唯一标识的访问请求分组中包括的设备识别信息与识别信息匹配的条件下确定允许访问有效地址 的访问源对应于有效地址，在地址转换表中，由访问请求分组指定。

公开(公告)号：US07818507B2

公开(公告)日：2010-10-19

申请号：US11098621

申请日：2005-04-04

申请人： Takeshi Yamazaki ,  Jeffrey Douglas Brown ,  Scott Douglas Clark ,  Charles Ray Johns

发明人： Takeshi Yamazaki ,  Jeffrey Douglas Brown ,  Scott Douglas Clark ,  Charles Ray Johns

IPC分类号： G06F12/00 ,  G06F13/00 ,  G06F13/28

CPC分类号： G06F12/0831 ,  G06F12/0813 ,  G06F2212/251 ,  G06F2212/253

摘要： Methods and apparatus provide for sending a data command from a first of a plurality of devices to a first address concentrator within a first of a plurality of processing systems; selecting one of the other processing systems, the selected processing system having data addressed by the data command stored therein; sending the data command to a first address concentrator of the selected processing system; and broadcasting the data command from the first address concentrator of the selected processing system to a second address concentrator in each of the processing systems.

摘要翻译： 方法和装置提供从多个设备中的第一设备向多个处理系统中的第一个内的第一地址集中器发送数据命令; 选择其他处理系统之一，所选择的处理系统具有由其中存储的数据命令寻址的数据; 将所述数据命令发送到所选择的处理系统的第一地址集中器; 以及从所选择的处理系统的第一地址集中器将数据命令广播到每个处理系统中的第二地址集中器。

公开(公告)号：US20100050676A1

公开(公告)日：2010-03-04

申请号：US12515861

申请日：2008-02-06

申请人： Naoyoshi Takamatsu ,  Takeshi Yamazaki

发明人： Naoyoshi Takamatsu ,  Takeshi Yamazaki

IPC分类号： F25D31/00

CPC分类号： B60K11/02 ,  B60K2001/003 ,  B60K2001/005 ,  B60L3/0046 ,  B60L3/0053 ,  B60L11/123 ,  B60L11/14 ,  B60L11/1872 ,  B60L11/1874 ,  B60L2200/26 ,  Y02T10/6217 ,  Y02T10/7005 ,  Y02T10/705 ,  Y02T10/7077 ,  Y02T90/34

摘要： A cooling system has a configuration in which a cooling system for an inverter device and a motor generator also serves as a cooling system for a battery. In this configuration, a control device performs temperature-raising control of the battery when a battery temperature is below a prescribed temperature lower limit value. The control device controls an operation of a switching valve such that cooling water from a cooling medium path is outputted to a bypass path. Further, if a cooling water temperature is lower than a prescribed temperature, the control device controls the inverter device such that a power loss during a switching operation in a switching element included in the inverter device becomes larger than a power loss during normal control. As a result, the cooling system having a small-sized, low-cost configuration rapidly recovers capacity decline of the battery, which occurs at low temperatures.

摘要翻译： 冷却系统具有这样的结构，其中用于逆变器装置的冷却系统和电动发电机也用作电池的冷却系统。 在该结构中，当电池温度低于规定的温度下限值时，控制装置进行电池的升温控制。 控制装置控制切换阀的操作，使得来自冷却介质路径的冷却水被输出到旁路路径。 此外，如果冷却水温度低于规定温度，则控制装置控制逆变器装置，使得包括在逆变器装置中的开关元件的开关操作期间的功率损耗变得大于正常控制期间的功率损耗。 结果，具有小型，低成本配置的冷却系统快速恢复在低温下发生的电池的容量下降。

公开(公告)号：US20090222610A1

公开(公告)日：2009-09-03

申请号：US12282393

申请日：2006-11-30

申请人： Takeshi Yamazaki ,  Hideyuki Saito ,  Yuji Takahashi ,  Hideki Mitsubayashi

发明人： Takeshi Yamazaki ,  Hideyuki Saito ,  Yuji Takahashi ,  Hideki Mitsubayashi

IPC分类号： G06F13/28

CPC分类号： G06F13/4027 ,  G06F13/28 ,  G06F2213/0024

摘要： A downstream port 22 of a bridge 20 connecting a processor unit and a peripheral device acknowledges access from the peripheral device via one of a plurality of downstream channels available for access by the peripheral device to a memory of the processor unit, the downstream channels being virtual channels provided for interfacing with the peripheral device. The router 24 routes the access to upstream channels each assigned a memory bandwidth available for access to the memory, the upstream channels being virtual channels supported by the processor unit. In this process, the router refers to a table storing identifiers of the downstream channels and identifiers of the upstream channels in association with each other so as to allocate to the peripheral device the upstream channel corresponding to the downstream channel used by the peripheral device, in response to the access from the peripheral device.

摘要翻译： 连接处理器单元和外围设备的桥接器20的下游端口22通过可用于由外围设备访问的多个下游信道之一确认来自外围设备的访问到处理器单元的存储器，下游信道是虚拟的 提供用于与外围设备接口的通道。 路由器24将访问路由到每个分配有可用于访问存储器的存储器带宽的上游信道，上行信道是由处理器单元支持的虚拟信道。 在这个过程中，路由器是指相互关联地存储下游信道的标识符和上游信道的标识符的表，以便向外围设备分配与外围设备使用的下游信道对应的上行信道， 响应来自外围设备的访问。

公开(公告)号：US20090127943A1

公开(公告)日：2009-05-21

申请号：US11921210

申请日：2006-05-31

申请人： Eiichi Machida ,  Takeshi Yamazaki ,  Hirotatsu Ikeno

发明人： Eiichi Machida ,  Takeshi Yamazaki ,  Hirotatsu Ikeno

IPC分类号： H02K15/12

CPC分类号： H02K3/34 ,  H02K5/08 ,  H02K15/12 ,  Y10T29/49009

摘要： Brushless motor (1) which is an electric motor, is provided with a stator unit (3) inserted in and engaged with case (2). A part of the coating material (21) for coating the coil (17) of the stator unit (3) enters the receiving part (13) formed in the bottom part (2B) of the case (2); and the bottom part (2B) of the case (2) and the coil (17) are linked by this coating material (21). While coating, the coating material (21) is dripped from the opening side of the case (2) with the stator unit (3) in the inserted condition in the case (2).

摘要翻译： 作为电动机的无刷电动机（1）设置有插入壳体（2）并与其接合的定子单元（3）。 用于涂覆定子单元（3）的线圈（17）的涂层材料（21）的一部分进入形成在壳体（2）的底部（2B）中的接收部分（13）中。 并且壳体（2）的底部（2B）和线圈（17）由该涂层材料（21）连接。 在涂布的同时，将涂料（21）从壳体（2）的开口侧滴下，定子单元（3）处于插入状态（2）中。

公开(公告)号：US07535902B2

公开(公告)日：2009-05-19

申请号：US11221189

申请日：2005-09-07

申请人： Takeshi Yamazaki ,  Naohiko Takamura

发明人： Takeshi Yamazaki ,  Naohiko Takamura

IPC分类号： H04L12/28

CPC分类号： H04L29/12009 ,  H04L29/12028 ,  H04L29/12839 ,  H04L61/103 ,  H04L61/6022 ,  H04L67/1002 ,  H04L67/1023

摘要： Disclosed is a traffic distribution device, which is used in a way that connects to a 0-th network, a first network including one or more servers and to a second network connected to the first network and including M-pieces of high-order layer processing devices associated with 0 through M-1, capable of improving a throughput of a network without changing a server sided default gateway address. The traffic distribution device has first packet relay unit translating a packet containing a predetermined destination IP address from the 0-th network into a packet in which a destination MAC address is set as a first network sided MAC address of the high-order layer processing device, which MAC address is associated with a remainder value obtained by dividing a source IP address of the packet by M, and transmitting this packet onto the first network; and second packet relay unit translating the packet from the second network into a packet in which a destination MAC address is a second network sided MAC address of the high-order layer processing device, which MAC address is associated with a remainder value obtained by dividing the destination IP address of the packet by M, and transmitting this packet onto the second network.

摘要翻译： 公开了一种流量分配装置，其以连接到第0网络，包括一个或多个服务器的第一网络和连接到第一网络的第二网络的方式使用，并且包括M个高阶层 处理与0到M-1相关联的设备，能够改善网络的吞吐量而不改变服务器端的默认网关地址。 业务分配装置具有第一分组中继单元，将包含预定目的地IP地址的分组从第0网络转换为目的地MAC地址被设置为高阶层处理设备的第一网络侧MAC地址的分组 该MAC地址与通过将该分组的源IP地址除以M而获得的余数值相关联，并将该分组发送到第一网络; 以及第二分组中继单元将分组从第二网络转换成其中目的地MAC地址是高阶层处理设备的第二网络侧MAC地址的分组，该MAC地址与通过划分 M的目的地IP地址，并将该数据包发送到第二个网络。

公开(公告)号：US07512722B2

公开(公告)日：2009-03-31

申请号：US10631541

申请日：2003-07-31

申请人： Matthew Edward King ,  Peichum Peter Liu ,  David Mui ,  Takeshi Yamazaki

发明人： Matthew Edward King ,  Peichum Peter Liu ,  David Mui ,  Takeshi Yamazaki

IPC分类号： G06F13/28 ,  G06F9/46

CPC分类号： G06F13/28

摘要： A method, an apparatus, and a computer program product are provided for completing a plurality of (direct memory access) DMA commands in a computer system. It is determined whether the DMA commands are chained together as a list DMA command. Upon a determination that the DMA commands are chained together as a list DMA command, it is also determined whether a current list element of the list DMA command is fenced. Upon a determination that the current list element is not fenced, a next list element is fetched and processed before the current list element has been completed.

摘要翻译： 提供了一种用于在计算机系统中完成多个（直接存储器访问）DMA命令的方法，装置和计算机程序产品。 确定DMA命令是否作为列表DMA命令链接在一起。 在确定DMA命令被链接在一起作为列表DMA命令时，还确定列表DMA命令的当前列表元素是否被围栏。 当确定当前列表元素不被围栏时，在当前列表元素已经完成之前获取和处理下一个列表元素。