INTEGRATED CIRCUIT DESIGN SYSTEM AND METHOD
    56.
    发明公开

    公开(公告)号:US20240354484A1

    公开(公告)日:2024-10-24

    申请号:US18537878

    申请日:2023-12-13

    CPC classification number: G06F30/398 G06F2111/06

    Abstract: Disclosed herein are integrated circuit design system and method including: a genetic algorithm model unit configured to form a first parent generation using a performance simulation result for an arbitrary integrated circuit design point, form a child generation from the first parent generation using a genetic algorithm, form a surrounding design point based on the first parent generation as a mutant generation, and then select N points with the highest performance among the first parent generation, the child generation, and the mutant generation as a second parent generation; a comparison unit configured to compare a design range of the second parent generation and a preset reference range; and a regression model unit configured to train a regression model using the design range of the second parent generation when a design range of the second parent generation is narrower than or equal to the preset reference range.

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