公开(公告)号：US12095793B2

公开(公告)日：2024-09-17

申请号：US17720216

申请日：2022-04-13

Applicant: Mellanox Technologies, Ltd.

Inventor： Chen Rozenbaum ,  Shauli Arazi ,  Bartley Richardson

IPC: H04L9/40 ,  G06N3/08

CPC classification number: H04L63/1425 ,  G06N3/08

Abstract: Apparatuses, systems, and techniques for detecting that a host device is subject to a malicious network attack using a machine learning (ML) detection system are described. A computing system includes a graphics processing unit (GPU) and an integrated circuit with a network interface, and a hardware acceleration engine. The integrated circuit hosts a hardware-accelerated security service to extract features from network data and metadata from the hardware acceleration engine and sends the extracted features to the GPU. Using the ML detection system, the GPU determines whether the host device is subject to a malicious network attack using the extracted features. The GPU can send an enforcement rule to the integrated circuit responsive to a determination that the host device is subject to the malicious network activity.

公开(公告)号：US20240305508A1

公开(公告)日：2024-09-12

申请号：US18120303

申请日：2023-03-10

Applicant: Mellanox Technologies, Ltd.

Inventor： Johan Jacob Mohr

IPC: H04L25/06

CPC classification number: H04L25/061

Abstract: Systems, methods, and devices for performing predictive baseline wander correction are described. A digital signal may be demodulated to obtain an estimated transmitted symbol stream, based on which an amount of baseline wander error may be predicted. The predicted amount of baseline wander error may be used to correct for baseline wander.

公开(公告)号：US12088712B2

公开(公告)日：2024-09-10

申请号：US17699517

申请日：2022-03-21

Applicant: Mellanox Technologies Ltd.

Inventor： Eitan Hirshberg ,  Boris Pismenny ,  Miriam Menes ,  Eilon Greenstein

IPC: H04L9/08

CPC classification number: H04L9/0891 ,  H04L9/0822

Abstract: A method of encrypting a memory transaction include, using a computing device operating a processor, encrypting a set of buffers to be transmitted, each buffer encrypted using an encryption key of a set of encryption keys.

公开(公告)号：US12081361B2

公开(公告)日：2024-09-03

申请号：US17893692

申请日：2022-08-23

Applicant: Mellanox Technologies Ltd.

Inventor： Amit Kazimirsky ,  Nir Sucher

IPC: H04L12/40 ,  G06F1/3203 ,  G06F1/3206 ,  G06F1/3234 ,  H04L12/10 ,  H04L43/08

CPC classification number: H04L12/40039 ,  G06F1/3203 ,  G06F1/3206 ,  G06F1/3253 ,  H04L12/10 ,  H04L43/08

Abstract: Methods, systems, and machine-readable mediums to predict signal conductor traffic and to transition between signal conductor states in accordance with the predictions. In at least one embodiment, a scoring system is used to select a prediction method, which is used to determine when to transition a signal conductor between active and inactive states.

公开(公告)号：US20240283813A1

公开(公告)日：2024-08-22

申请号：US18453199

申请日：2023-08-21

Applicant: Mellanox Technologies, Ltd.

Inventor： Rami Ailabouni ,  Meni Orenbach ,  Ahmad Atamli

IPC: H04L9/40 ,  G06F9/455

CPC classification number: H04L63/1441 ,  G06F9/45558 ,  H04L63/1416 ,  G06F2009/45587 ,  G06F2009/45595

Abstract: A system includes a data processing unit (DPU). The DPU is to receive a notification associated with a virtualized computing environment on a host system coupled to the DPU. The DPU is associated with a security characteristic. A threat type associated with the threat is identified. Based on at least one of the threat type associated with the threat or the security characteristic of the virtualized computing environment, a threat prevention operation to address the threat is determined. The threat prevention operation is caused to be performed on the host system.

公开(公告)号：US20240267320A1

公开(公告)日：2024-08-08

申请号：US18166398

申请日：2023-02-08

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Glenn Dearth ,  Alex Netes ,  Nitin Hande

IPC: H04L45/00 ,  H04L45/28 ,  H04L45/42

CPC classification number: H04L45/22 ,  H04L45/28 ,  H04L45/42

Abstract: A system includes a routing fabric and management circuitry. The routing fabric connects processing devices. The management circuitry determines an event associated with a first routing path included in the routing fabric. The management circuitry identifies a processing partition that is affected by the event based on a first local identifier. The first local identifier is associated with the first routing path and is assigned to the processing partition, and the processing partition is associated with one or more of the processing devices. The management circuitry routes one or more processes associated with the processing partition based on a second local identifier. The second local identifier is associated with a second routing path included in the routing path and is assigned to the processing partition. The one or more processes are routed using the second routing path.

公开(公告)号：US20240259298A1

公开(公告)日：2024-08-01

申请号：US18162174

申请日：2023-01-31

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Adi Horowitz ,  Omri Kahalon ,  Gal Shalom ,  Rabia Loulou ,  Aviad Yehezkel ,  Matty Kadosh

IPC: H04L45/24 ,  H04L61/103

CPC classification number: H04L45/245 ,  H04L61/103 ,  H04L2101/668

Abstract: Systems and methods herein are for one or more processing units of a subnet manger (SM) to communicate configuration information with at least one subnet management agent (SMA) that is associated with at least one switch and with a host machine, the configuration information to enable the at least one switch to configure a forwarding table based in part on a mapping of at least one virtual network address to physical network addresses of two or more physical ports of the host machine, and the configuration information to enable the host machine to communicate with other host machines using the at least one switch and the at least one virtual network address.

公开(公告)号：US20240259234A1

公开(公告)日：2024-08-01

申请号：US18162195

申请日：2023-01-31

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Lior Hodaya Bezen ,  Alex Netes ,  Mark Hummel ,  Glenn Dearth ,  Lion Levi

IPC: H04L12/46 ,  H04L49/356

CPC classification number: H04L12/4675 ,  H04L49/358

Abstract: Systems and methods herein are for one or more processing units to communicate configuration information between a subnet manager (SM) and at least one switch, where the configuration information is to enable the at least one switch to provide communication between at least two host machines through a number of network links that exclusively use two or more physical ports of the at least two host machines, and where the configuration information is associated with a mapping of different virtual network addresses and two or more physical ports and is associated with a relationship between the different virtual network addresses.

公开(公告)号：US20240259233A1

公开(公告)日：2024-08-01

申请号：US18162938

申请日：2023-02-01

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Gal Shalom ,  Omri Kahalon ,  Adi Horowitz ,  Aviad Yehezkel ,  Liran Liss ,  Rabia Loulou ,  Matty Kadosh

IPC: H04L12/46 ,  H04L12/66 ,  H04L49/351 ,  H04L49/356

CPC classification number: H04L12/4625 ,  H04L12/66 ,  H04L49/351 ,  H04L49/358

Abstract: Systems and methods herein are for one or more processing units to modify a network access layer of an ethernet communication to include a local route header (LRH) of an InfiniBand (IB) communication for transmission over an IB network, the modification further to retain ethernet information of all layers of the ethernet communication or to remove at least one of the layers of the ethernet communication for the IB communication.

公开(公告)号：US20240250911A1

公开(公告)日：2024-07-25

申请号：US18589466

申请日：2024-02-28

Applicant: Mellanox Technologies, Ltd.

Inventor： Roni Bar Yanai ,  Jiawei Wang ,  Yossef Efraim ,  Chen Rozenbaum

IPC: H04L47/2483 ,  H04L45/748

CPC classification number: H04L47/2483 ,  H04L45/748

Abstract: A method includes providing a library of hardware-agnostic packet-processing functions. A functional hardware-agnostic specification of a packet-processing pipeline is received from a user. The specification is defined in terms of one or more of the packet-processing functions drawn from the library. A hardware-specific design of the packet-processing pipeline, which is suited to given hardware, is derived from the specification.