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公开(公告)号：US20090237143A1
公开(公告)日：2009-09-24
申请号：US12053388
申请日：2008-03-21
CPC分类号： H03H11/405 , H03F3/45183 , H03F3/45659 , H03F2200/456 , H03F2203/45318 , H03F2203/45526 , H03F2203/45646 , H03H11/0416 , H03H11/483
摘要： A capacitance multiplier circuit is configured to sense a current through a capacitor in an RC filter of the circuit and to multiply the current so as to achieve a capacitance multiplier effect without adding additional circuitry or requiring additional power. The circuit includes an RC filter, a first signal path connected to a filter output, and a second signal path connected to an input to the filter. A current output through the filter (iout) is split between the two paths, sensed in the first path and multiplied in the second path. The multiplied current is fed back from the second path to the filter input to raise the effective capacitance of capacitor C. The capacitance multiplier circuit, in raising the effective capacitance of the capacitor in the filter, does not affect the frequency response, linearity performance and/or stability of the overall circuit.
摘要翻译： 电容乘法器电路被配置为感测通过电路的RC滤波器中的电容器的电流，并且乘以电流以实现电容倍增器效应，而不增加附加电路或需要额外的功率。 电路包括RC滤波器，连接到滤波器输出的第一信号路径和连接到滤波器的输入端的第二信号路径。 通过滤波器（iout）的电流输出在两条路径之间分开，在第一路径中感测并在第二条路径中相乘。 倍增电流从第二路径反馈到滤波器输入，以提高电容器C的有效电容。电容乘法器电路在提高滤波器中的电容器的有效电容时不影响频率响应，线性性能和 /或整体电路的稳定性。
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公开(公告)号：US20080157866A1
公开(公告)日：2008-07-03
申请号：US11617826
申请日：2006-12-29
申请人： Joe M. SMITH , Gary P. ENGLISH
发明人： Joe M. SMITH , Gary P. ENGLISH
CPC分类号： H03H11/483 , H03F1/56 , H03F3/347 , H03F2200/456 , H03F2200/546
摘要： An integrated circuit including a capacitance multiplier having reduced parasitics and injected noise compared to conventional multiplier methods. The integrated circuit includes a reference capacitor and a current mirror arrangement coupled to the reference capacitor. The current mirror arrangement, which includes a current gain factor N, varies the capacitance of the reference capacitor by a factor of N+1, based on the reference capacitor current. The current mirror arrangement includes an operational amplifier operating in conjunction with two mirror transistors to form a current mirror arrangement having little or no series resistance. The current mirror also can include a plurality of resistors configured to reduce the noise from the capacitance multiplier, thus making the capacitance multiplier useful for applications that may require relatively low noise.
摘要翻译： 与常规乘法器方法相比，包括具有减小的寄生效应和注入噪声的电容倍增器的集成电路。 集成电路包括参考电容器和耦合到参考电容器的电流镜装置。 包括电流增益系数N的电流镜配置基于参考电容器电流，将参考电容器的电容改变为N + 1的因子。 电流镜装置包括与两个镜晶体管结合工作的运算放大器，以形成具有很少或没有串联电阻的电流镜布置。 电流镜还可以包括被配置为减少来自电容倍增器的噪声的多个电阻器，从而使电容乘法器可用于可能需要相对低的噪声的应用。
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公开(公告)号：US20070096793A1
公开(公告)日：2007-05-03
申请号：US11469907
申请日：2006-09-05
申请人： Katsuhiro Kato , Kenji Ichikawa , Atsushi Nagayama
发明人： Katsuhiro Kato , Kenji Ichikawa , Atsushi Nagayama
IPC分类号： H03H11/40
CPC分类号： H03K19/00315 , H01L27/0266
摘要： A semiconductor device includes first and second lines, a first transistor configured to electrically connect with the second line, and a second transistor configured to electrically connect the first line and the first transistor, the second transistor being turned ON when a bias voltage for operation is impressed between the first and second lines.
摘要翻译： 半导体器件包括第一和第二线，被配置为与第二线电连接的第一晶体管和被配置为电连接第一线和第一晶体管的第二晶体管，当操作偏置电压为第二晶体管时，第二晶体管导通 印在第一和第二行之间。
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公开(公告)号：US20050107064A1
公开(公告)日：2005-05-19
申请号：US10715631
申请日：2003-11-18
申请人： Aly Ismail
发明人： Aly Ismail
CPC分类号： H03H11/04 , H03H11/1291 , H03H11/40 , H03H11/525
摘要： A low-noise filter for a wireless receiver is disclosed. The low-noise filter comprises an amplifier and a filter comprising a frequency dependent negative resistance implemented using a general impedance converter to realize a bi-quad filter. The low-noise filter is implemented such that noise generated by the filter when an in-band signal is processed is prevented from appearing at the output of the amplifier stage.
摘要翻译： 公开了一种用于无线接收机的低噪声滤波器。 低噪声滤波器包括放大器和滤波器，该滤波器包括使用通用阻抗转换器来实现双二进制滤波器实现的频率相关负电阻。 实现低噪声滤波器，使得当处理带内信号时由滤波器产生的噪声被防止出现在放大器级的输出端。
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公开(公告)号：US6037843A
公开(公告)日：2000-03-14
申请号：US175605
申请日：1998-10-20
申请人： Kenneth Stephen Hunt
发明人： Kenneth Stephen Hunt
CPC分类号： H03H11/405 , H03B5/1206 , H03B5/1228 , H03B5/1271 , H03B2201/02
摘要： A controllable reactance implemented within an integrated circuit includes a first sub-circuit (20) comprising a reactive element, for example a capacitor 12, coupled in series with a transistor (14). A controllable current source (16) injects a controllable bias current through the transistor (14) to vary the effective resistance of the transistor (14) and hence the effective complex impedance of the capacitor combination. A second transistor (18) amplifies the current to increase the effective capacitance. Preferably, a second sub-circuit (24) includes corresponding components (26, 28, 30) to mirror the real component of the current flowing in the first sub-circuit (20), and transistors (32 and 34) to reflect an inverse current to the coupling node line (22) to cancel the real component of the current at the node, to thus simulate a purely capacitive circuit. An oscillator embodying this circuit is also disclosed. The invention can provide a controllable capacitance without the need for a conventional varactor diode.
摘要翻译： 在集成电路内实现的可控电抗包括第一子电路（20），其包括与晶体管（14）串联耦合的电抗元件（例如电容器12）。 可控电流源（16）通过晶体管（14）注入可控偏置电流，以改变晶体管（14）的有效电阻，从而改变电容器组合的有效复阻抗。 第二晶体管（18）放大电流以增加有效电容。 优选地，第二子电路（24）包括对应于在第一子电路（20）中流动的电流的实分量的对应部件（26,28,30），以及用于反映第一子电路（20）的晶体管（32和34） 电流到耦合节点线（22）以抵消节点处的电流的实部分量，从而模拟纯电容电路。 还公开了体现该电路的振荡器。 本发明可以提供可控电容，而不需要常规的变容二极管。
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公开(公告)号：US06028496A
公开(公告)日：2000-02-22
申请号：US90047
申请日：1998-06-03
CPC分类号： H03H11/50 , H03H11/486
摘要： An active inductor which consumes less direct current (DC) power and is stably biased, has a smaller number of bias pins, a higher quality factor (Q) and fewer controlling ports, than that of the prior art, is realized in metal semiconductor field effect transistor or bipolar transistor technology. The active inductor includes an inverting amplifier of a common source (common emitter) type, which inversely amplifies an input signal and outputs the amplified signal as an output signal, a non-inverting amplifier of a common gate (common base) cascode type, which non-inversely amplifies the output signal and the amplified signal as the input signal, a capacitor connected between the input signal and a reference signal, and a biasing portion for biasing the inverting amplifier and the non-inverting amplifier.
摘要翻译： 消耗更少的直流（DC）功率并且被稳定偏置的有源电感器具有较少数量的偏置引脚，比现有技术更高的质量因子（Q）和更少的控制端口在金属半导体领域中实现 效应晶体管或双极晶体管技术。 有源电感器包括公共源（公共发射极）类型的反相放大器，其反相放大输入信号并输出放大的信号作为输出信号，公共栅极（公共基极）共射型类型的非反相放大器，其中 将输出信号和放大信号作为输入信号反相放大，连接在输入信号和参考信号之间的电容器和用于偏置反相放大器和非反相放大器的偏置部分。
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公开(公告)号：US5327027A
公开(公告)日：1994-07-05
申请号：US814965
申请日：1991-12-24
申请人： Stewart S. Taylor
发明人： Stewart S. Taylor
CPC分类号： H03H11/405
摘要： A circuit is described herein which effectively multiplies the value of a capacitor. The circuit draws current from an input node, where this current being drawn is related to the gain of an amplifier and the value of a capacitor, thus effectively amplifying the capacitance value of a capacitor as seen at the input node.
摘要翻译： 这里描述了有效地乘以电容器的值的电路。 该电路从输入节点吸取电流，其中所绘制的电流与放大器的增益和电容器的值相关，从而有效地放大电容器的电容值，如输入节点所示。
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公开(公告)号：US4992752A
公开(公告)日：1991-02-12
申请号：US364058
申请日：1989-06-09
申请人： Kenneth R. Cioffi
发明人： Kenneth R. Cioffi
CPC分类号： H03H11/28
摘要： An apparatus and method are disclosed for performing impedance transformations on the order of 4:1 to 8:1 or more over extremely broad bandwidths. The transformations are performed in an apparatus having a plurality of n distributed amplifiers having one common synthetic transmission line sharing inductive elements and a second transmission line connected in parallel to the other transmission lines. The transmission lines incorporate active elements preferably in the form of FET cascode pairs. In one embodiment, the second transistor of each cascode pair is replaced with n smaller gate FETs to decrease DC power requirements and provide additional doncution paths for impedance reduction.
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59.发明授权
公开(公告)号：US4587500A
公开(公告)日：1986-05-06
申请号：US535962
申请日：1983-09-23
申请人： Kanji Tanaka , Kazuhisa Ishiguro
发明人： Kanji Tanaka , Kazuhisa Ishiguro
摘要： A variable reactance circuit which can produce equivalent reactance varying from negative given values to positive given values in accordance with fundamental reactance elements such as capacitor, coil, etc. The present invention has a big advantage of being capable of easily producing the positive, negative equivalent reactance given times as much as the basic reactance element with the use of a circuit which can be integrated.
摘要翻译： 一种可变电抗电路，其可以根据诸如电容器，线圈等的基本电抗元件产生从负给定值到正给定值的等效电抗。本发明具有很大的优点，能够容易地产生正负等效 通过使用可以集成的电路，给出与基本电抗元件一样多的电抗。
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公开(公告)号：US4521741A
公开(公告)日：1985-06-04
申请号：US435501
申请日：1982-10-20
申请人： Ernst Ruberl
发明人： Ernst Ruberl
CPC分类号： H03F3/1855 , H03F1/56
摘要： In an impedance transformer circuit which is intended for capacitive voltage sources having a high output impedance, particularly for capacitor microphones, comprises two sequential amplifier stages with an overall gain of close to one. The output of the first amplifier stage having a large input impedance, and of itself, a high gain, is applied to the inverting input 2 of the second amplifier stage V.sub.2, which, of itself, again exhibits a high gain and whose output is fed back to its non-inverting input through at least one feedback loop containing the first amplifier as a resistor controlled by the capacitive transducer. Further, in AC current terms, the load resistor of the first amplifier stage is located between the inverting input and the non-inverting input of the second amplifier stage, and the reference potential "0" for the input and output AC voltage signals is not provided by any of the inverting or non-inverting inputs of the two amplifier stages.
摘要翻译： 在用于具有高输出阻抗的电容性电压源的阻抗变压器电路中，特别是用于电容式麦克风的阻抗变压器电路包括总体增益接近1的两个顺序的放大器级。 具有大输入阻抗并且本身具有高增益的第一放大器级的输出被施加到第二放大器级V2的反相输入端2，其本身再次呈现高增益并且其输出被馈送 通过至少一个反馈回路返回到其非反相输入，该反馈环包含作为由电容换能器控制的电阻器的第一放大器。 此外，在AC电流条件下，第一放大级的负载电阻位于第二放大级的反相输入和非反相输入之间，并且输入和输出AC电压信号的参考电位“0”不是 由两个放大器级的反相或非反相输入提供。
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