公开(公告)号：US20230412076A1

公开(公告)日：2023-12-21

申请号：US18242876

申请日：2023-09-06

Applicant: STMICROELECTRONICS (ROUSSET) SAS

Inventor： Michel CUENCA ,  Sebastien ORTET

IPC: H02M3/158

CPC classification number: H02M3/158 ,  H02M1/0022

Abstract: A switched-mode power supply includes a voltage ramp generation circuit that generates a voltage ramp signal. The voltage ramp generation circuit includes, selectively connected in parallel, at least three capacitors. The selective connection of the capacitors is made according to a value of an internal power supply voltage of the switched-mode power supply.

公开(公告)号：US20230409869A1

公开(公告)日：2023-12-21

申请号：US18316152

申请日：2023-05-11

Applicant: STMicroelectronics ( Rousset ) SAS

Inventor： Laurent Folliot ,  Pierre Demaj

IPC: G06N3/04

CPC classification number: G06N3/04

Abstract: According to one aspect, there is proposed a method for transforming a trained artificial neural network including a binary convolution layer followed by a pooling layer then a batch normalization layer, the method includes obtaining the trained artificial neural network and transforming the trained artificial neural network such that the order of the layers of the trained artificial neural network is modified by displacing the batch normalization layer after the convolution layer.

公开(公告)号：US20230378295A1

公开(公告)日：2023-11-23

申请号：US18197909

申请日：2023-05-16

Applicant: STMicroelectronics (Crolles 2) SAS ,  STMicroelectronics (Rousset) SAS

Inventor： Siddhartha DHAR ,  Stephane MONFRAY ,  Alain FLEURY ,  Franck JULIEN

IPC: H01L29/423 ,  H01L27/088 ,  H01L21/8234 ,  H01L29/40

CPC classification number: H01L29/42368 ,  H01L27/088 ,  H01L21/823462 ,  H01L29/401

Abstract: A transistor includes a semiconductor layer with a stack of a gate insulator and a conductive gate on the semiconductor layer. A thickness of the gate insulator is variable in a length direction of the transistor. The gate insulator includes a first region having a first thickness below a central region of the conductive gate. The gate insulator further includes a second region having a second thickness, greater than the first thickness, below an edge region of conductive gate.

公开(公告)号：US11803729B2

公开(公告)日：2023-10-31

申请号：US17524094

申请日：2021-11-11

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Olivier Rouy

IPC: G06K19/077 ,  H05B45/50 ,  H05B45/32 ,  H05B45/3725 ,  G06K19/07

CPC classification number: G06K19/07705 ,  G06K19/0718 ,  G06K19/0723 ,  H05B45/32 ,  H05B45/3725 ,  H05B45/50

Abstract: A light-emitting diode has an anode terminal coupled to a node of application of a power supply voltage by a first transistor and a cathode terminal coupled to a node of application of a reference voltage by a second transistor. A microcontroller includes a digital-to-analog converter and a comparator, with the comparator having a first input coupled to one of the anode and cathode terminals of the diode and a second input configured to receive an output voltage of the converter. An output signal of the comparator controls one of the first and second transistors to turn off when the comparator detects an operating condition where current flow in the light-emitting diode exceeds maximum current limit (such as with the light-emitting diode operating in an exponential operating area.

公开(公告)号：US11768512B2

公开(公告)日：2023-09-26

申请号：US17119788

申请日：2020-12-11

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Jimmy Fort ,  Nicolas Demange

IPC: G05F3/26 ,  G05F1/46

CPC classification number: G05F3/262 ,  G05F1/461

Abstract: An embodiment method for smoothing consumed current is based on a current copying suite and on a current source supplying a reference current, the currents being transformed into a reference voltage for the regulation of a voltage regulator such that the consumed current viewed by the power supply only depends on the reference current.

公开(公告)号：US20230297126A1

公开(公告)日：2023-09-21

申请号：US18119535

申请日：2023-03-09

Applicant: STMicroelectronics (Rousset) SAS ,  STMicroelectronics SA ,  STMicroelectronics (Alps) SAS

Inventor： Alexandre TRAMONI ,  Florent SIBILLE ,  Patrick ARNOULD

IPC: G05F1/46 ,  H04B5/00

CPC classification number: G05F1/46 ,  H04B5/0037

Abstract: An electronic device includes a near-field communication module and a powering circuit for delivering a power supply voltage to the near-field communication module. When the near-field communication module is in a low power mode, the powering circuit is configured for an operational mode where it is periodically started to provide the power supply voltage.

公开(公告)号：US11762633B2

公开(公告)日：2023-09-19

申请号：US17039353

申请日：2020-09-30

Applicant: STMicroelectronics (Grenoble 2) SAS ,  STMicroelectronics (Rousset) SAS

Inventor： Rene Peyrard ,  Fabrice Romain

IPC: G06F7/76 ,  G06F7/48 ,  G06F7/499

CPC classification number: G06F7/764 ,  G06F7/4824 ,  G06F7/49942

Abstract: The present disclosure relates to a circuit and method for determining a sign indicator bit of a binary datum including a step for processing of the binary datum masked with a masking operation, and not including any processing step of the binary datum.

公开(公告)号：US11736018B2

公开(公告)日：2023-08-22

申请号：US17370609

申请日：2021-07-08

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Sebastien Ortet ,  Didier Davino

IPC: H02M3/158 ,  H02M1/00

CPC classification number: H02M3/1588 ,  H02M1/0009 ,  H02M1/0025

Abstract: An embodiment electronic device includes a first circuit including first and second transistors series-coupled between a node of application of a power supply voltage and a node of application of a reference voltage, the first and second transistors being coupled to each other by a first node, and a second circuit, configured to compare a first voltage on the first node with first and second voltage thresholds.

公开(公告)号：US20230260835A1

公开(公告)日：2023-08-17

申请号：US18109569

申请日：2023-02-14

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Christian RIVERO ,  Pascal FORNARA

IPC: H01L21/768 ,  H01L23/522 ,  H01L23/532

CPC classification number: H01L21/76846 ,  H01L21/76858 ,  H01L21/76883 ,  H01L21/76844 ,  H01L23/5226 ,  H01L23/53238 ,  H01L23/53266

Abstract: A method of manufacturing a contact on a semiconductor region includes a step of forming a stack of layers on lateral walls and at a bottom of an orifice (aligned with the semiconductor region) crossing a dielectric region along a longitudinal direction. The step of forming step is carried out from a first surface of the dielectric region and includes forming a polysilicon layer and a layer of a first metal in contact with the polysilicon layer. The first metal is preferably a metal selected from the group of transition metals and is well suited to forming with the polysilicon layer a metal silicide. The method further includes a step of performing thermal anneal causing a reaction between the first metal and the polysilicon layer to produce a layer of metal silicide. At least a portion of that layer of metal silicide extends in the longitudinal direction of the orifice.

公开(公告)号：US20230252258A1

公开(公告)日：2023-08-10

申请号：US18107245

申请日：2023-02-08

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Nicolas CORDIER

IPC: G06K19/07 ,  H05K1/18

CPC classification number: G06K19/0723 ,  H05K1/181 ,  H05K2201/10098 ,  H05K2201/10151

Abstract: A contactless communication device includes an electronic integrated circuit chip and an antenna coupled to the electronic integrated circuit chip to supply an electric signal for powering the electronic integrated circuit chip. An ambient luminosity detection element is coupled to the electronic integrated circuit chip. An ambient luminosity level measured by the ambient luminosity detection element is supplied to the electronic integrated circuit chip for comparison to a darkness threshold. A contactless communication is authorized only when the measured ambient luminosity level is greater than the darkness threshold.