Semiconductor device and corresponding method

    公开(公告)号:US10049966B2

    公开(公告)日:2018-08-14

    申请号:US15356109

    申请日:2016-11-18

    Inventor: Alberto Arrigoni

    Abstract: A semiconductor device includes a leadframe that includes contact pins and a semiconductor die that has protruding connection formations. A flexible support member is disposed between the leadframe and the semiconductor die and supports the semiconductor die. The flexible support member has electrically conductive lines that extend between the leadframe and the semiconductor die. The electrically conductive lines of the flexible support member are electrically coupled with the contact pins of the leadframe and with the connection formations of the semiconductor die.

    Energy harvester, corresponding apparatus and method

    公开(公告)号:US10044290B2

    公开(公告)日:2018-08-07

    申请号:US15160674

    申请日:2016-05-20

    Abstract: An energy harvester circuit operates to harvest energy in battery-less electrical apparatus. The circuit includes a string of capacitors coupled to a circuit input to receive energy to be harvested. A string of transistors are coupled as pumping transistors to respective ones of the capacitors in the string of capacitors. A compensation coupling circuit is coupled between each transistor in the string of pumping transistors and one of a subsequent or a preceding transistor in the string of pumping transistors.

    CONFIGURABLE ACCELERATOR FRAMEWORK
    679.
    发明申请

    公开(公告)号:US20180189642A1

    公开(公告)日:2018-07-05

    申请号:US15423284

    申请日:2017-02-02

    Abstract: Embodiments are directed towards a configurable accelerator framework device that includes a stream switch and a plurality of convolution accelerators. The stream switch has a plurality of input ports and a plurality of output ports. Each of the input ports is configurable at run time to unidirectionally pass data to any one or more of the output ports via a stream link. Each one of the plurality of convolution accelerators is configurable at run time to unidirectionally receive input data via at least two of the plurality of stream switch output ports, and each one of the plurality of convolution accelerators is further configurable at run time to unidirectionally communicate output data via an input port of the stream switch.

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