SEMICONDUCTOR DEVICE
    63.
    发明公开

    公开(公告)号:US20240291263A1

    公开(公告)日:2024-08-29

    申请号:US18231824

    申请日:2023-08-09

    发明人: Hironori NAGASAWA

    IPC分类号: H02H3/20 H02H1/00

    CPC分类号: H02H3/20 H02H1/0007

    摘要: According to one embodiment, a semiconductor device includes a first transistor, a first circuit, and a second circuit. A source of the first transistor is coupled to a first terminal. A gate of the first transistor is coupled to a first node. The first circuit includes a first comparator and a current limiting circuit. The second circuit includes a second comparator, a second transistor, a third transistor, and a third circuit. A source of the second transistor is grounded. A drain of the second transistor is coupled to the first node. The third circuit is configured to turn on the second transistor and the third transistor for a first time period based on an output of the second comparator.

    TRAINING METHOD, APPARATUS AND NON-TRANSITORY COMPUTER READABLE MEDIUM

    公开(公告)号:US20240290074A1

    公开(公告)日:2024-08-29

    申请号:US18484909

    申请日:2023-10-11

    发明人: Tomohiro NAKAI

    摘要: According to one embodiment, a training method computes a first feature map and a first attention map from a first image, and computes a second feature map and a second attention map from a second image, by inputting the first image, which does not include a defective area of a target, and the second image, which includes the defective area of the target, to a machine learning model. The training method computes a first loss, based on the first attention map. The training method computes a class classification of the target, based on the second feature map and the second attention map. The training method computes a second loss, based on the class classification. The training method computes a total loss, based on the first loss and the second loss. The training method updates a parameter of the machine learning model so as to minimize the total loss.

    ANOMALY DETECTION DEVICE, PROCESSING DEVICE, ANOMALY DETECTION METHOD, AND COMPUTER PROGRAM PRODUCT

    公开(公告)号:US20240289196A1

    公开(公告)日:2024-08-29

    申请号:US18517036

    申请日:2023-11-22

    IPC分类号: G06F11/07

    CPC分类号: G06F11/0751

    摘要: An anomaly detection device according to an embodiment includes a parameter set storage unit, a detection unit, an information input unit, and a processing unit. The parameter set storage unit stores a plurality of parameter sets used for detecting an anomaly in at least one piece of target data. The detection unit detects an anomaly in the at least one piece of target data using at least one parameter set selected from the parameter sets, and acquires at least one detection result. The information input unit receives an input of teaching information corresponding to the at least one detection result. The processing unit performs at least one of update, addition, and deletion of the parameter set based on the teaching information.

    PROCESSING DEVICE AND RADAR SYSTEM
    68.
    发明公开

    公开(公告)号:US20240280691A1

    公开(公告)日:2024-08-22

    申请号:US18520649

    申请日:2023-11-28

    发明人: Ryota SEKIYA

    IPC分类号: G01S13/90

    CPC分类号: G01S13/9058

    摘要: According to one embodiment, a processing device includes a processor. The processor is configured to acquire first radar echoes from a plurality of first antennas, generate a first radar image by calculating a spatial correlation between the first radar echoes represented by complex numbers, acquire second radar echoes from a plurality of second antennas, generate a second radar image by calculating a spatial correlation between the second radar echoes represented by complex numbers, and generate a third radar image by applying at least one of a first synthesis method by synthesis of pixel values represented by complex numbers or a second synthesis method by image synthesis to the generated first and second radar images.

    Electronic circuitry and power converter

    公开(公告)号:US12068750B2

    公开(公告)日:2024-08-20

    申请号:US18180582

    申请日:2023-03-08

    IPC分类号: H03K5/135 H03K5/00

    摘要: According to one embodiment, an electronic circuitry includes a clock generation circuit configured to generate a first clock signal; a first conversion circuit configured to convert an input signal into a first signal having a frequency corresponding to the first clock signal based on the first clock signal; a first electromagnetic field coupler configured to transmit the first signal by electromagnetic field coupling; a second electromagnetic field coupler configured to transmit the first clock signal by electromagnetic field coupling; and a second conversion circuit configured to convert the first signal transmitted by the first electromagnetic field coupler into a second signal having a frequency corresponding to the input signal, based on the first clock signal transmitted by the second electromagnetic field coupler.

    Semiconductor device
    70.
    发明授权

    公开(公告)号:US12068280B2

    公开(公告)日:2024-08-20

    申请号:US17193703

    申请日:2021-03-05

    发明人: Hideaki Kitazawa

    摘要: There is provided a semiconductor device including a first electrode including a first plate portion, the first plate portion including a first surface and a second surface facing the first surface, a plurality of semiconductor chips provided above the second surface, and a second electrode including a second plate portion provided above the semiconductor chips, the second plate portion including a third surface facing the second surface and a fourth surface facing the third surface, the second plate portion including a plurality of protrusion portions provided between the semiconductor chips and the third surface, the protrusion portions being connected to the third surface, each of the protrusion portions including a top surface including the same shape as a shape of each of the semiconductor chips in a plane parallel to the second surface, the second plate portion including a second outer diameter larger than a first diameter of a smallest circle circumscribing the protrusion portions provided on an outermost side among the protrusion portions in a plane parallel to the third surface, and a third plate portion including a fifth surface connected to the fourth surface and a sixth surface facing the fifth surface, the third plate portion including a third outer diameter equal to or smaller than the first diameter.