Abstract:
A pixel structure includes a scan line, a data line, an active element, a first passivation layer, a second passivation layer and a pixel electrode. The data line includes a first data metal segment and a second data metal layer. The active element includes a gate electrode, an insulating layer, a channel layer, a source and a drain. The channel layer is positioned on the insulating layer above the gate electrode. The source and the drain are positioned on the channel layer. The source is coupled to the data line. The first passivation layer and the second passivation layer cover the active element and form a first contact hole to expose a part of the drain. The second passivation layer covers a part edge of the drain. The pixel electrode is disposed across the second passivation layer and coupled to the drain via the first contact hole.
Abstract:
A tri-gate pixel structure includes three sub-pixel regions, three gate lines, a data line, three thin film transistors (TFTs), three pixel electrodes, and a common line. The gate lines are disposed along a first direction, and the data line is disposed along a second direction. The TFTs are disposed in the sub-pixel regions respectively, wherein each TFT has a gate electrode electrically connected to a corresponding gate line, a source electrode electrically connected to the data line, and a drain electrode. The three pixel electrodes are disposed in the three sub-pixel regions respectively, and each pixel electrode is electrically connected to the drain electrode of one TFT respectively. The common line crosses the gate lines and partially overlaps the three gate lines, and the common line and the three pixel electrodes are partially overlapped to respectively form three storage capacitors.
Abstract:
A liquid crystal display (LCD) panel and a manufacturing method thereof are provided. The manufacturing method includes providing a panel including a first substrate having scan lines, data lines, an active device electrically connecting the scan and data lines, and a pixel electrode electrically connecting the active device, a second substrate having an opposite electrode, and a liquid crystal (LC) layer disposed between the first and the second substrates and having a monomer material. A first curing voltage and a second curing voltage are applied to the scan and data lines, respectively. The second curing voltage is thus transmitted to the pixel electrode. The first curing voltage is higher than an absolute value of the second curing voltage. The monomer material is polymerized to form a first polymer stabilized alignment (PSA) layer between the LC layer and the first substrate and a second PSA layer between the LC layer and the second substrate. The electrical field is then removed.
Abstract:
A liquid crystal display unit structure and the manufacturing method thereof are provided. The liquid crystal display unit structure comprises a patterned first metal layer with a first data line segment and a gate line on a substrate; a patterned dielectric layer covering the first data line and the gate line having a plurality of first openings and a second opening therein, a patterned etch stop layer having a first portion located above the first data line segment and a second portion; a patterned second metal layer including a common electrode line, a second data line segment, a source electrode and a drain electrode, wherein the first portion of the patterned etch stop layer is between the first data line segment and the common line; a patterned passivation layer and a patterned transparent conductive layer.
Abstract:
In one aspect of this invention, a pixel structure includes a scan line formed on a substrate and a data line formed over the substrate defining a pixel area, a switch formed inside the pixel area on the substrate, a shielding electrode having a first portion and a second portion extending from the first portion, and formed over the scan line, the data line and the switch, where the first portion is overlapped with the switch and the second portion is overlapped with the data line, and a pixel electrode having a first portion and a second portion extending from the first portion, and formed over the shielding electrode in the pixel area, where the first portion is overlapped with the first portion of the shielding electrode so as to define a storage capacitor therebetween and the second portion has no overlapping with the second portion of the shielding electrode.
Abstract:
The present invention in one aspect relates to a solar cell formed on a substrate, a bottom electrode member formed on the solar cell, an electrophoretic display panel formed on the bottom electrode member, having a plurality of electrophoretic cell structures spatially arranged in a matrix form, each electrophoretic cell structure containing a plurality of charged particles movable in the electrophoretic cell structure responsively to applied fields, and a top electrode member formed on the electrophoretic display panel, where at least one of the bottom electrode member and the top electrode member includes a plurality of in-plane switching (IPS) electrodes. Each IPS electrode is positioned in relation to a corresponding electrophoretic cell structure for controlling movements of the charged particles therein along a horizontal direction parallel to the electrophoretic display panel.
Abstract:
An active device array substrate and its fabricating method are provided. According to the subject invention, the elements of an array substrate such as the thin film transistors, gate lines, gate pads, data lines, data pads and storage electrodes, are provided by forming a patterned first metal layer, an insulating layer, a patterned semiconductor layer and a patterned metal multilayer. Furthermore, the subject invention uses the means of selectively etching certain layers. Using the aforesaid means, the array substrate of the subject invention has some layers with under-cut structures, and thus, the number of the time-consuming and complicated mask etching process involved in the production of an array substrate can be reduced. The subject invention provides a relatively simple and time-saving method for producing an array substrate.
Abstract:
A method for producing a light reflecting structure in a transflective or reflective liquid crystal display uses one or two masks for masking a photoresist layer in a back-side exposing process. The pattern on the masks is designed to produce rod-like structures or crevices and holes on exposed and developed photoresist layer. After the exposed photoresist is developed, a heat treatment process or a UV curing process is used to soften the photoresist layer so that the reshaped surface is more or less contiguous but uneven. A reflective coating is then deposited on the uneven surface. One or more intermediate layers can be made between the masks, between the lower mask and the substrate, and between the upper masks and the photoresist layers. The masks and the intermediate layers can be made in conjunction with the fabrication of the liquid crystal display panel.
Abstract:
The present invention in one aspect relates to a solar cell formed on a substrate, a bottom electrode member formed on the solar cell, an electrophoretic display panel formed on the bottom electrode member, having a plurality of electrophoretic cell structures spatially arranged in a matrix form, each electrophoretic cell structure containing a plurality of charged particles movable in the electrophoretic cell structure responsively to applied fields, and a top electrode member formed on the electrophoretic display panel, where at least one of the bottom electrode member and the top electrode member includes a plurality of in-plane switching (IPS) electrodes. Each IPS electrode is positioned in relation to a corresponding electrophoretic cell structure for controlling movements of the charged particles therein along a horizontal direction parallel to the electrophoretic display panel.
Abstract:
A pixel structure includes a scan line, a data line, an active element, a first passivation layer, a second passivation layer and a pixel electrode. The data line includes a first data metal segment and a second data metal layer. The active element includes a gate electrode, an insulating layer, a channel layer, a source and a drain. The channel layer is positioned on the insulating layer above the gate electrode. The source and the drain are positioned on the channel layer. The source is coupled to the data line. The first passivation layer and the second passivation layer cover the active element and form a first contact hole to expose a part of the drain. The second passivation layer covers a part edge of the drain. The pixel electrode is disposed across the second passivation layer and coupled to the drain via the first contact hole.