公开(公告)号：US5584746A

公开(公告)日：1996-12-17

申请号：US283152

申请日：1994-08-03

申请人： Kouichi Tanaka ,  Hiromasa Hashimoto ,  Fumio Suzuki

发明人： Kouichi Tanaka ,  Hiromasa Hashimoto ,  Fumio Suzuki

IPC分类号： B24B37/30 ,  B24B1/00 ,  B24B29/00

CPC分类号： B24B37/30

摘要： A method of polishing semiconductor wafers and apparatus therefore are described. According to the present invention, a semiconductor wafer mounted on the lower side of a wafer mounting plate may be polished on a polishing pad by the front referenced polishing technique due to a flexibility of the wafer mounting plate to make the same to conform in detail with the backside contour of the wafer under polishing pressure and a selected flexibility differential between a wafer holding region and the outer moving region of the wafer mounting plate. An apparatus includes the wafer mounting plate that also works as a vacuum chuck plate is constructed out of a flexible thin disc of hard plastics, a central round region is used for a wafer holding region facing the backside of the wafer and the outside annular region is more flexible to work as a moving region, a pan-shaped rubber sheet is secured to a ring projection, the wafer mounting disc is adhered to the inner periphery of the rubber sheet at and along the periphery thereof to generate a sealed space, passes for vacuum communication and for a compressed air supply are formed through a rotary shaft, and vacuum chuck holes are communicated with the vacuum pass and the compressed air pass is in communication with a sealed space in the wafer holder.

摘要翻译： 因此，对半导体晶片及其装置进行研磨的方法进行了说明。 根据本发明，安装在晶片安装板的下侧的半导体晶片可以通过前置抛光技术在抛光垫上抛光，这是由于晶片安装板的灵活性使其与 抛光压力下的晶片的背面轮廓和晶片保持区域与晶片安装板的外部移动区域之间的选定的柔性差异。 一种装置，包括晶片安装板，其作为真空吸盘板，由硬塑料的柔性薄盘构成，中心圆形区域用于面向晶片背面的晶片保持区域，外部环形区域为 更灵活地作为移动区域工作，将盘形橡胶片固定到环形突起，晶片安装盘在其周围并沿其周边粘附到橡胶片的内周，以产生密封空间，通过 通过旋转轴形成真空连通和压缩空气供给，并且真空吸盘孔与真空通道连通，压缩空气通道与晶片保持器中的密封空间连通。

公开(公告)号：US5564965A

公开(公告)日：1996-10-15

申请号：US355212

申请日：1994-12-09

申请人： Kouichi Tanaka ,  Hiromasa Hashimoto ,  Fumio Suzuki

发明人： Kouichi Tanaka ,  Hiromasa Hashimoto ,  Fumio Suzuki

IPC分类号： B24B37/22 ,  B24D13/14 ,  B24B5/00

CPC分类号： B24B37/22

摘要： A polishing apparatus is provided which can effect surface-based polishing of a wafer without causing the wafer to produce an undulation or peripheral protrusion. A sheetlike polishing member 5 constructed by superposing a foam sheet 2 containing minute closed cells in a web of chloroprene rubber and a velour type non-woven fabric (polishing cloth 3) is attached fast to the surface of a polishing table 1. The polishing member is capable of polishing a given wafer while maintaining the uniformity of thickness of the wafer or an oxide film formed on the surface of the wafer because, during the application of pressure by a pressing member 14, the polishing pressure is uniformly distributed throughout the entire rear surface of the wafer and the polishing member is bent in conformity with the global rises and falls in the wafer surface.

摘要翻译： 提供一种抛光装置，其可以实现晶片的基于表面的抛光，而不会导致晶片产生起伏或周边突起。 通过将包含微小闭孔的发泡片2叠加在氯丁橡胶和丝绒型无纺布（抛光布3）的网中而构成的片状抛光构件5快速地附着在抛光台1的表面上。抛光构件 能够在保持晶片的厚度均匀性或形成在晶片表面上的氧化物膜的同时抛光给定晶片，因为在通过按压部件14施加压力期间，抛光压力均匀地分布在整个后部 晶片的表面和抛光构件与晶片表面的全局上升和下降一致地弯曲。

公开(公告)号：US5251030A

公开(公告)日：1993-10-05

申请号：US896327

申请日：1992-06-10

申请人： Kouichi Tanaka

发明人： Kouichi Tanaka

IPC分类号： H03M7/30 ,  G06T9/00 ,  H04N7/137

CPC分类号： H04N19/51 ,  H04N19/56

摘要： An MC predicting apparatus which ensures a high prediction accuracy against input image signal stream and avoids arithmetic operation of an evaluation function from becoming an overhead for an image encoding process is provided. Sequence numbers given to respective frames are discriminated, and a degree of interframe correlation is decided from a difference in sequence number of the preceding and current frames. A reference block generator adaptively controls, depending on the degree of interframe correlation, the reference range of MC prediction of the preceding frame stored in a frame memory. As a result, the number of times of arithmetic operation of an evaluation function for MC prediction can be reduced and a prediction accuracy can be improved.

公开(公告)号：US4909366A

公开(公告)日：1990-03-20

申请号：US211915

申请日：1988-06-27

申请人： Kouichi Tanaka

发明人： Kouichi Tanaka

IPC分类号： F16D41/06 ,  F16D41/067

CPC分类号： F16D41/067

摘要： A one-way clutch comprises a shaft and an outer race therearound. Plural rollers are circumferentially arranged around the shaft in contact therewith. A torque transmission control ring is interposed between the outer ring and the shaft. The control ring is locked with the outer race and includes grip roller locking spaces each having a shallower part and a deeper part in which spaces the rollers are respectfully received. In one directional rotation of the shaft, the rollers enter into gripping contact between the shaft and control ring to transmit torque and, in the opposite directional rotation, the rollers move out of gripping contact into an idling position. In the idling position, a surface of each control ring space contacts the associated roller to enable the roller to enter into gripping contact between the shaft and control ring substantially immediately upon rotation of the one-way clutch in a direction reverse from the idling direction.

摘要翻译： 单向离合器包括轴和外圈。 多个辊周向地布置成与轴接触。 在外圈和轴之间插入扭矩传递控制环。 控制环与外圈锁定，并且包括夹紧辊锁定空间，每个具有较浅部分和较深部分，在该部分中辊子被尊重地接收在该空间中。 在轴的一个方向旋转中，辊进入轴和控制环之间的夹紧接触以传递扭矩，并且在相反的方向旋转中，辊从夹紧触点移出到空转位置。 在怠速位置，每个控制环空间的表面接触相关联的辊子，以使得当单向离合器沿与空转方向相反的方向旋转时，基本上立即基本上立即进入到轴和控制环之间的夹紧接触。

公开(公告)号：US4335322A

公开(公告)日：1982-06-15

申请号：US75872

申请日：1979-09-17

申请人： Kouichi Tanaka ,  Masaharu Mori

发明人： Kouichi Tanaka ,  Masaharu Mori

IPC分类号： H03K5/04 ,  H03K5/00 ,  H03K17/28

CPC分类号： H03K5/04

摘要： In a pulse generator responsive to an input pulse, use is made of a time constant circuit having a time constant for charge and a time constant for discharge considerably greater than the former. The time constant circuit is rapidly charged during presence of the input pulse in accordance with the time constant for charge, through a switching circuit kept on, while it is slowly discharged in accordance with the time constant for discharge after the switching circuit is rendered off due to disappearance of the input pulse. During charging and discharging, the time constant circuit gives a variable level to a threshold circuit for producing an output pulse when the variable level exceeds a threshold level. The output pulse lasts until the variable level is rendered less than the threshold level after disappearance of the input pulse. Additionally, the pulse generator comprises a combination of a constant current portion and a constant voltage portion to stabilize the input and output pulses. The pulse generator is suitable for a noise pulse canceller for a radio receiver.

摘要翻译： 在响应于输入脉冲的脉冲发生器中，使用时间常数电路，其具有用于充电的时间常数，而放电时间常数远大于前者。 时间常数电路在输入脉冲存在期间根据充电时间常数通过开关电路保持时间快速充电，同时按照放电开关时间常数缓慢放电，在开关电路断开后，放电时间常数 输入脉冲消失。 在充电和放电期间，当可变电平超过阈值电平时，时间常数电路给阈值电路提供可变电平以产生输出脉冲。 在输入脉冲消失后，输出脉冲持续到可变电平变得小于阈值电平。 此外，脉冲发生器包括恒定电流部分和恒定电压部分的组合，以稳定输入和输出脉冲。 脉冲发生器适用于无线电接收机的噪声脉冲消除器。

公开(公告)号：US4156237A

公开(公告)日：1979-05-22

申请号：US825372

申请日：1977-08-17

申请人： Kunihiro Okada ,  Kouichi Tanaka ,  Takeyuki Endoh ,  Shigeru Yabuuchi

发明人： Kunihiro Okada ,  Kouichi Tanaka ,  Takeyuki Endoh ,  Shigeru Yabuuchi

IPC分类号： H04N9/00 ,  G06F3/153 ,  G06F7/64 ,  G06T11/00 ,  G09G5/02 ,  G09G5/36 ,  G09G5/42 ,  H04N9/04 ,  G06K15/20

CPC分类号： G09G5/024 ,  G09G5/42

摘要： A colored display system for displaying a plurality of colored solid surfaces each of which is obtained by coloring or painting in a region, comprising circuit means for generating figure information signals representative of the respective solid surfaces, a priority circuit for selecting one of the figure information signals in response to a predetermined priority order when the figure information signals are simultaneously generated, a memory circuit for storing color information, circuit means for reading out the color information corresponding to the selected figure information signal from the memory circuit and a color cathode ray tube for displaying the colored solid surfaces in response to the color information read out.

摘要翻译： 一种用于显示多个着色固体表面的彩色显示系统，每个彩色固体表面通过在区域中着色或涂漆获得，包括用于产生表示相应固体表面的图形信息信号的电路装置，用于选择图形信息之一的优先电路 同时产生图形信息信号时响应于预定优先级顺序的信号，用于存储颜色信息的存储电路，用于从存储器电路读出与所选图形信息信号相对应的颜色信息的电路装置和彩色阴极射线管 用于响应于读出的颜色信息显示着色的固体表面。

公开(公告)号：US09181479B2

公开(公告)日：2015-11-10

申请号：US13133489

申请日：2009-12-08

申请人： Juichi Fukatani ,  Izumi Omoto ,  Seiko Ichikawa ,  Kouichi Tanaka ,  Mayu Kameda

发明人： Juichi Fukatani ,  Izumi Omoto ,  Seiko Ichikawa ,  Kouichi Tanaka ,  Mayu Kameda

IPC分类号： G02F1/13363 ,  C09K19/20 ,  C09K19/30 ,  C09K19/54 ,  C08F222/10 ,  C09K19/04

CPC分类号： C09K19/2007 ,  B32B2457/202 ,  C08F222/1006 ,  C09K19/3068 ,  C09K19/54 ,  C09K2019/0448 ,  G02F1/13363 ,  Y10T428/1036 ,  Y10T428/105 ,  Y10T428/2891 ,  Y10T428/31504

摘要： A retardation element containing a liquid crystalline compound, and at least one compound selected from the group consisting of a compound represented by the following formula (1), a compound represented by the following formula (2) and a compound represented by the following formula (3). In the formula (1), n represents an integer of 3 to 10 and R2 represents a —CH2—CH2— group, a —CH2—CH(CH3)— group or a —CH2—CH2—CH2— group. In the formula (2), R3 represents a —(CH2)p— group or a phenylene group and p represents an integer of 4 to 8. In the formula (3), R4 represents a substituted phenylene group. In the formulas (1) to (3), R1-1, R1-2 and R1-3 each represent an alkyl group having a branched structure having 5 or more carbon atoms and R1-1, R1-2 and R1-3 may be the same or different.

摘要翻译： 含有液晶化合物的延迟元件和选自由下式（1）表示的化合物，下式（2）表示的化合物和下式（I）表示的化合物中的至少一种化合物 3）。 在式（1）中，n表示3〜10的整数，R 2表示-CH 2 -CH 2 - 基，-CH 2 -CH（CH 3） - 基或-CH 2 -CH 2 -CH 2 - 基。 式（2）中，R3表示 - （CH2）p-基或亚苯基，p表示4〜8的整数。式（3）中，R4表示取代亚苯基。 式（1）〜（3）中，R1-1，R1-2和R1-3各自表示具有碳原子数5以上的支链结构的烷基，R1-1，R1-2和R1-3可以 相同或不同

公开(公告)号：US08420503B2

公开(公告)日：2013-04-16

申请号：US12933113

申请日：2009-04-01

申请人： Shoji Akiyama ,  Makoto Kawai ,  Atsuo Ito ,  Yoshihiro Kubota ,  Kouichi Tanaka ,  Yuji Tobisaka ,  Hiroshi Tamura

发明人： Shoji Akiyama ,  Makoto Kawai ,  Atsuo Ito ,  Yoshihiro Kubota ,  Kouichi Tanaka ,  Yuji Tobisaka ,  Hiroshi Tamura

IPC分类号： H01L21/762

CPC分类号： H01L21/76254 ,  H01L27/12

摘要： A method for easily manufacturing a transparent SOI substrate having: a main surface with a silicon film formed thereon; and a rough main surface located on a side opposite to a side where the silicon film is formed. A method for manufacturing transparent SOI substrate, having a silicon film formed on a first main surface of the transparent insulating substrate, while a second main surface of the transparent insulating substrate, an opposite to the first main surface, is roughened. The method includes at least the steps of: roughening the first main surface with an RMS surface roughness lower than 0.7 nm and the second main surface with an RMS surface roughness higher than the surface roughness of the first main surface to prepare the transparent insulating substrate; and forming the silicon film on the first main surface of the transparent insulating substrate.

摘要翻译： 一种容易制造透明SOI衬底的方法，其具有：形成有硅膜的主表面; 以及位于与形成硅膜的一侧相反一侧的粗糙主表面。 制造透明SOI衬底的方法，其中在透明绝缘衬底的第一主表面上形成硅膜，同时透明绝缘衬底的与第一主表面相反的第二主表面被粗糙化。 该方法至少包括以下步骤：使RMS表面粗糙度低于0.7nm的第一主表面粗糙化，并且第二主表面的RMS表面粗糙度高于第一主表面的表面粗糙度，以制备透明绝缘基板; 以及在所述透明绝缘基板的所述第一主表面上形成所述硅膜。

公开(公告)号：US08357586B2

公开(公告)日：2013-01-22

申请号：US12920363

申请日：2009-03-23

申请人： Shoji Akiyama ,  Yoshihiro Kubota ,  Atsuo Ito ,  Kouichi Tanaka ,  Makoto Kawai ,  Yuji Tobisaka ,  Hiroshi Tamura

发明人： Shoji Akiyama ,  Yoshihiro Kubota ,  Atsuo Ito ,  Kouichi Tanaka ,  Makoto Kawai ,  Yuji Tobisaka ,  Hiroshi Tamura

IPC分类号： H01L21/46 ,  H01L21/30 ,  H01L21/762

CPC分类号： H01L21/76254 ,  H01L21/30608

摘要： Provided is a method for manufacturing an SOI wafer, which is capable of: efficiently removing an ion-implanted defect layer existing in an ion implanted layer in the vicinity of a peeled surface peeled by an ion implantation peeling method; ensuring the in-plane uniformity of a substrate; and also achieving cost reduction and higher throughput. The method for manufacturing an SOI wafer includes at least the steps of: bonding a silicon wafer with or without an oxide film onto a handle wafer to prepare a bonded substrate, wherein the silicon wafer has an ion implanted layer formed by implanting hydrogen ions and/or rare gas ions into the silicon wafer; peeling the silicon wafer along the ion implanted layer, thereby transferring the silicon wafer onto the handle wafer to produce a post-peeling SOI wafer; immersing the post-peeling SOI wafer in an aqueous ammonia-hydrogen peroxide solution; and performing a heat treatment at a temperature of 900° C. or higher on the immersed post-peeling SOI wafer, and/or polishing a silicon film layer of the immersed post-peeling SOI wafer, through CMP polishing by 10 to 50 nm.

摘要翻译： 提供一种SOI晶片的制造方法，其能够：有效地除去通过离子注入剥离法剥离的剥离面附近的离子注入层中存在的离子注入缺陷层; 确保基板的面内均匀性; 并且还实现成本降低和更高的吞吐量。 制造SOI晶片的方法至少包括以下步骤：将具有或不具有氧化物膜的硅晶片接合到处理晶片上以制备键合衬底，其中所述硅晶片具有通过注入氢离子形成的离子注入层和/ 或稀有气体离子进入硅晶片; 沿着离子注入层剥离硅晶片，从而将硅晶片转移到处理晶片上以产生剥离后的SOI晶片; 将剥离后的SOI晶片浸渍在氨 - 过氧化氢水溶液中; 并在浸渍的剥离后的SOI晶片上进行900℃以上的温度的热处理，和/或通过CMP研磨10〜50nm来研磨浸渍的剥离后的SOI晶片的硅膜层。

公开(公告)号：US20100240535A1

公开(公告)日：2010-09-23

申请号：US12733746

申请日：2008-09-10

申请人： Yutaka Yoneda ,  Hideo Otaka ,  Kouichi Tanaka ,  Kazuhiko Tsunoda ,  Naohiro Nagai ,  Akira Iimura

发明人： Yutaka Yoneda ,  Hideo Otaka ,  Kouichi Tanaka ,  Kazuhiko Tsunoda ,  Naohiro Nagai ,  Akira Iimura

IPC分类号： A01N59/00 ,  A01P1/00 ,  A01P13/00

摘要： The invention provides a bactericidal/algicidal method including adding an oxidant-based bactericidal/algicidal agent and a stabilizer therefor to a target water system, characterized in that the amount of combined chlorine or the stabilizer in the water system is controlled by generating free residual chlorine in the water system, and a bactericidal/algicidal method including adding an oxidant-based bactericidal/algicidal agent and a stabilizer therefor to a target water system, characterized in that the amount of the oxidant-based bactericidal/algicidal agent added is controlled so that the concentration of total residual chlorine in the water system falls within a predetermined range, and the amount of combined chlorine or the stabilizer is controlled so that the concentration of free residual chlorine in the water system falls within a predetermined range.An object of the present invention is to provide a bactericidal/algicidal method including adding an oxidant-based bactericidal/algicidal agent and a stabilizer therefor to a target water system for bactericidal/algicidal treatment, wherein the amount of combined chlorine or the stabilizer is controlled, and the amount of the oxidant-based bactericidal/algicidal agent added is controlled, which method realizes effective utilization of the stabilizer, to thereby reduce the amount of the stabilizer employed and to reduce COD and the amount of nitrogen derived from the stabilizer, and which method does not require a special control apparatus for in-line mixing as described above.

摘要翻译： 本发明提供一种杀菌/杀藻方法，包括向目标水体系中加入氧化剂类杀菌剂/杀藻剂及其稳定剂，其特征在于，通过产生游离残留氯来控制水体系中组合氯或稳定剂的量 在水系统中，以及杀菌/杀藻剂方法，包括向目标水体系中加入氧化剂类杀菌剂/杀藻剂及其稳定剂，其特征在于控制添加的氧化剂类杀菌/杀藻剂的量，使得 水系中的总残留氯浓度落在预定范围内，控制氯或稳定剂的混合量，使得水系中游离残留氯的浓度落在预定范围内。 本发明的目的是提供一种杀菌/杀藻方法，其包括将氧化剂型杀菌剂/杀藻剂及其稳定剂加入到用于杀菌/杀藻处理的目标水体系中，其中组合氯或稳定剂的量被控制 ，并且控制添加的氧化剂型杀菌剂/杀藻剂的量，该方法实现了稳定剂的有效利用，从而减少了所用稳定剂的用量，并降低了来自稳定剂的COD和氮的量，以及 该方法不需要用于如上所述的在线混合的特殊控制装置。