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61.发明授权公开(公告)号：US09742270B2
公开(公告)日：2017-08-22
申请号：US14986425
申请日：2015-12-31
Inventor： Sandor Petenyi
CPC classification number: G05F1/625
Abstract: A voltage regulator is controlled to improve supply voltage rejection by cancelling an alternating component of a supply voltage signal that is capacitively coupled to a high-impedance node within the voltage regulator. This cancellation is done by capacitively coupling an inverted version of the alternating component to the high-impedance node to thereby substantially cancel the alternating component present on the high-impedance node. The high-impedance node may be a high-impedance voltage reference node of the voltage regulator.
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公开(公告)号：US20170220058A1
公开(公告)日：2017-08-03
申请号：US15014320
申请日：2016-02-03
Inventor： Sandor Petenyi , Calogero Ribellino
IPC: G05F1/575
CPC classification number: G05F1/575
Abstract: A significant reduction of the amplitude of the transient response is obtained by keeping a low dropout regulator circuit in a closed loop condition. This is achieved by manipulation of the reference voltage level when an open loop condition arises due to a falling input voltage. In this case, the reference voltage level is tracked with the input voltage level, keeping the output voltage regulated. As a consequence, the power pass element of the regulator is not forced into the linear region (in the case of a MOSFET) or deep saturation (in the case of a bipolar transistor).
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公开(公告)号：US20170068594A1
公开(公告)日：2017-03-09
申请号：US15080307
申请日：2016-03-24
Inventor： Daniele Mangano , Michele Alessandro Carrano , Gaetano Distefano , Antonin Fried
CPC classification number: G06F11/1068 , G06F11/1044 , G11C29/52
Abstract: A method includes: writing first data in a first partition of a first memory module and second data in a first partition of a second memory module, and selectively operating the first and second memory modules in a first operating mode and a second operating mode. The first operating mode includes writing parity bits for the first data in a second partition of the second memory module and parity bits for the second data in a second partition of the first memory module. The second operating mode includes writing further data instead of parity bits in the second partition of one or both the first memory module and the second memory module.
Abstract translation: 一种方法包括：将第一数据存储在第一存储器模块的第一分区中，并将第二数据写入第二存储器模块的第一分区中，并且以第一操作模式和第二操作模式选择性地操作第一和第二存储器模块。 第一操作模式包括在第二存储器模块的第二分区中写入用于第一数据的奇偶校验位和在第一存储器模块的第二分区中写入用于第二数据的奇偶校验位。 第二操作模式包括在第一存储器模块和第二存储器模块中的一个或两个的第二分区中写入另外的数据而不是奇偶校验位。
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公开(公告)号：US20220302763A1
公开(公告)日：2022-09-22
申请号：US17838794
申请日：2022-06-13
Inventor： Tomas Teply
IPC: H02J50/12 , H02J7/02 , H02J50/70 , H02J50/80 , H02J50/00 , H01F38/14 , H01F27/36 , H02J50/40 , H04R1/10 , H01F27/28
Abstract: A system and method for wireless charging a wireless earbud. The wireless earbud having a body that includes a passive magnetic shield and a coil. The coil is wound around a portion of the body comprising the passive magnetic shielding. The wireless earbud receiving wireless energy in response to the placement of the body within an electromagnetic field, which results in the charging of a battery of the wireless earbud.
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公开(公告)号：US20220200344A1
公开(公告)日：2022-06-23
申请号：US17124915
申请日：2020-12-17
Inventor： Michal Toula
Abstract: A method implemented by a wireless charging receiver (RX) includes detecting, by the wireless charging RX, that a voltage potential of an output of a rectifier of the wireless charging RX has met a boost mode threshold; placing, by the wireless charging RX, the rectifier into a boost mode; and detecting, by the wireless charging RX, that the voltage potential of the output of the rectifier of the wireless charging RX has met a specified threshold, and based thereon, negotiating, by the wireless charging RX with a wireless charging transmitter (TX), to initiate a power transfer.
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Patent Agency Ranking
公开(公告)号：US20210011689A1
公开(公告)日：2021-01-14
申请号：US16941407
申请日：2020-07-28
Inventor： Mahesh CHOWDHARY , Miroslav BATEK , Marian LOUDA
Abstract: The disclosure describes methods and apparatus for quickly prototyping of a solution developed using one or more sensing devices (e.g., sensors), functional blocks, algorithm libraries, and customized logic. The methods produce firmware executable by a processor (e.g., a microcontroller) on an embedded device such as a development board, expansion board, or the like. By performing these methods on the apparatus described, a user is able to create a function prototype without having deep knowledge of the particular sensing device or any particular programming language. Prototypes developed as described herein enable the user to rapidly test ideas and develop sensing device proofs-of-concept. The solutions produced by the methods and apparatus improve the functioning of the sensor being prototyped and the operation of the embedded device where the sensor is integrated.
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公开(公告)号：US20200272589A1
公开(公告)日：2020-08-27
申请号：US16874055
申请日：2020-05-14
Inventor： Fred Rennig , Ludek Beran
IPC: G06F13/362 , G06F13/40 , G06F11/07 , H04L12/403 , G05B19/042
Abstract: A device includes a master device, a set of slave devices and a bus. The master device is configured to transmit first messages carrying a set of operation data message portions indicative of operations for implementation by slave devices of the set of slave devices, and second messages addressed to slave devices in the set of slave devices. The second messages convey identifiers identifying respective ones of the slave devices to which the second messages are addressed requesting respective reactions towards the master device within respective expected reaction intervals. The slave devices are configured to receive the first messages transmitted from the master device, read respective operation data message portions in the set of operation data message portions, implement respective operations as a function of the respective operation data message portions read, and receive the second messages transmitted from the master device.
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公开(公告)号：US20200259473A1
公开(公告)日：2020-08-13
申请号：US16786182
申请日：2020-02-10
Inventor： Sandor PETENYI
Abstract: A MOSFET has a current conduction path between source and drain terminals. A gate terminal of the MOSFET receives an input signal to facilitate current conduction in the current conduction path as a result of a gate-to-source voltage reaching a threshold voltage. A body terminal of the MOSFET is coupled to body voltage control circuitry that is sensitive to the voltage at the gate terminal of the MOSFET. The body voltage control circuitry responds to a reduction in the voltage at the gate terminal of the MOSFET by increasing the body voltage of the MOSFET at the body terminal of the MOSFET. As a result, there is reduction in the threshold voltage. The circuit configuration is applicable to amplifier circuits, comparator circuits and current mirror circuits.
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公开(公告)号：US10725746B2
公开(公告)日：2020-07-28
申请号：US16281040
申请日：2019-02-20
Inventor： Mahesh Chowdhary , Miroslav Batek , Marian Louda
Abstract: The disclosure describes methods and apparatus for quickly prototyping of a solution developed using one or more sensing devices (e.g., sensors), functional blocks, algorithm libraries, and customized logic. The methods produce firmware executable by a processor (e.g., a microcontroller) on an embedded device such as a development board, expansion board, or the like. By performing these methods on the apparatus described, a user is able to create a function prototype without having deep knowledge of the particular sensing device or any particular programming language. Prototypes developed as described herein enable the user to rapidly test ideas and develop sensing device proofs-of-concept. The solutions produced by the methods and apparatus improve the functioning of the sensor being prototyped and the operation of the embedded device where the sensor is integrated.
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公开(公告)号：US10528189B2
公开(公告)日：2020-01-07
申请号：US15948147
申请日：2018-04-09
Inventor： Milan Andrle , Martin Havlasek , Martin Fucik
Abstract: Disclosed is a method for testing touch screen displays during manufacture. A touch screen controller (TSC) is packaged, and the analog channels of the TSC are characterized, with resulting data being stored for later use. The TSC is programmed, and the touch screen display and TSC are packaged together. The touch screen display is tested using firmware in the TSC, enabling calculation of the inherent capacitances between force and sense lines of the touch screen display when connected to the TSC during operation. The testing involves, for each force and sense line pair, measuring an output signal generated by a receive channel of the TSC coupled to the sense line of that pair. Based upon the data gathered during characterization, and the signals measured during testing, the capacity of the touch screen display is then calculated.
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