公开(公告)号：US12255680B2

公开(公告)日：2025-03-18

申请号：US17730451

申请日：2022-04-27

Applicant: Texas Instruments Incorporated

Inventor： Deep Banerjee ,  Lokesh Kumar Gupta ,  Madhulatha Bonu ,  Vikas Thawani

IPC: H04B1/38 ,  H04B1/04 ,  H04B1/405 ,  H04B1/44

Abstract: A controller area network including one or more first network nodes biased from a first power supply voltage, and a second network node biased from a second, lower, power supply voltage. The second network node includes a transmitter driving a differential voltage onto bus lines to communicate a dominant bus state at a second dominant state common mode voltage, a receiver coupled to the bus lines, sense circuitry to sense a common mode voltage at the bus lines, and control circuitry to control a recessive state common mode voltage in response to the sensed dominant state common mode voltage.

公开(公告)号：US12255115B2

公开(公告)日：2025-03-18

申请号：US18617517

申请日：2024-03-26

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Christopher Daniel Manack ,  Patrick Francis Thompson ,  Qiao Chen

IPC: H01L23/31 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L23/495

Abstract: In examples, a semiconductor device comprises a semiconductor package including a mold compound covering a semiconductor die. The semiconductor package has a surface and a cavity formed in the surface. The semiconductor device comprises an electronic device positioned within the cavity, the electronic device coupled to the semiconductor die via a conductive terminal extending through the mold compound.

公开(公告)号：US12255077B2

公开(公告)日：2025-03-18

申请号：US18488990

申请日：2023-10-17

Applicant: Texas Instruments Incorporated

Inventor： Sadia Naseem ,  Vikas Gupta

IPC: H01L23/495 ,  H01L21/48

Abstract: The disclosed principles provide for implementing low-cost and fast metallic printing processes into the QFN and other no-leads package assembly flow to selectively print solderable material in areas that would otherwise be susceptible to corrosion and thus pose reliability risks. The problem of copper corrosion and poor BLR performance in no-leads packages because of remaining exposed copper areas after package singulation is solved by employing selective metallic printing processes in the assembly flow to coat all risk-prone areas with solder material. For example, for no-leads packages that are formed using printed leadframes, solder can be deposited through inkjet, screen, stencil, or photonic printing into the grooves which are formed after passivating the packages at the strip level. The singulating occurs through the grooves having solder printed therein, and results in wettable upper and sidewall surfaces of the outer ends of the leadframe for each package.

公开(公告)号：US12253965B2

公开(公告)日：2025-03-18

申请号：US18230797

申请日：2023-08-07

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Mark Edward Wentroble ,  Suzanne Mary Vining ,  Hassan Omar Ali

IPC: G06F13/40 ,  G06F13/42

Abstract: This disclosure generally relates to USB TYPE-C, and, in particular, DISPLAYPORT Alternate Mode communication in a USB TYPE-C environment. In one embodiment, a device determines a DISPLAYPORT mode and determines an orientation of a USB TYPE-C connector plug. A multiplexer multiplexes a DISPLAYPORT transmission based in part on the determined orientation of the USB TYPE-C connector plug.

公开(公告)号：US20250088770A1

公开(公告)日：2025-03-13

申请号：US18960448

申请日：2024-11-26

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Niraj NANDAN ,  Mihit Narendra MODY ,  Rajasekhar ALLU

IPC: H04N25/77

Abstract: In an example, a method includes receiving image data of an input image having lines therein. The method also includes storing a first portion of the image data in a circular buffer in a first memory, wherein the first portion begins at a circular buffer start line in the input image and ends at a circular buffer end line in the input image. The method includes storing a second portion of the image data in a linear buffer in a second memory, where the second portion is non-overlapping with the first portion. The method includes processing the second portion of the image data to produce a first block of an output image. The method includes processing the first portion of the image data to produce a second block of the output image.

公开(公告)号：US20250087563A1

公开(公告)日：2025-03-13

申请号：US18958152

申请日：2024-11-25

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Nazila Dadvand ,  Bernardo Gallegos

IPC: H01L23/495 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31

Abstract: A semiconductor package includes a pad and leads, the pad and leads including a base metal predominantly including copper, a first plated metal layer predominantly including nickel in contact with the base metal, and a second plated metal layer predominantly including silver in contact with the first plated metal layer. The first plated metal layer has a first plated metal layer thickness of 0.1 to 5 microns, and the second plated metal layer has a second plated metal layer thickness of 0.2 to 5 microns. The semiconductor package further includes an adhesion promotion coating predominantly including silver oxide in contact with the second plated metal layer opposite the first plated metal layer, a semiconductor die mounted on the pad, a wire bond extending between the semiconductor die and a lead of the leads, and a mold compound covering the semiconductor die and the wire bond.

公开(公告)号：US20250086739A1

公开(公告)日：2025-03-13

申请号：US18960112

申请日：2024-11-26

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Naveen Ambalametil Narayanan

IPC: G06Q50/18 ,  H04L9/32

Abstract: Devices, instructions stored on non-transitory processor-readable mediums, and programming tools are provided. In an example, instructions specify reading a first customer identification value from a first memory on a device; reading a second customer identification value from a first field in a certificate; determining whether the first customer identification value matches the second customer identification value; permitting application data to be read from a second field in the certificate in response to determining that the first customer identification value matches the second customer identification value; and permitting the application data to be written to a second memory on the device in response to determining that the first customer identification value matches the second customer identification value.

公开(公告)号：US20250086127A1

公开(公告)日：2025-03-13

申请号：US18958573

申请日：2024-11-25

Applicant: Texas Instruments Incorporated

Inventor： Geet Govind Modi ,  Sumantra Seth ,  Subhashish Mukherjee

IPC: G06F13/20 ,  G06F1/08

Abstract: A system for data transmission includes a physical (PHY) layer which has a rate detection module which determines an adopted clock rate. The rate detection module provides a rate detection signal indicative of the adopted clock rate. The PHY layer includes a reference clock generator which has an input coupled to receive the rate detection signal and an output to provide a reference clock output. The PHY layer includes a PHY interface which has a first input coupled to receive the reference clock output, a data input and a data output. The PHY interface receives data from a MAC interface at the data input and transmits data to the MAC interface through the data output responsive to the reference clock output.

公开(公告)号：US12248091B2

公开(公告)日：2025-03-11

申请号：US17486435

申请日：2021-09-27

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Karthik Subburaj ,  Sandeep Rao

IPC: G01S7/35 ,  G01S13/58 ,  G01S13/931

Abstract: An apparatus comprises processor cores and computer-readable mediums storing machine instructions for the processor cores. When executing the machine instructions, the processor cores obtain received signals for transmitted chirps from a radar sensor circuit. Each transmitted chirp comprises an A chirp segment, a time gap, and a B chirp segment, respectively. The processor cores sample the received signals to obtain sampled data matrices M1(A) for the A chirp segments and M1(B) for the B chirp segments. The processor cores perform a first Fourier transform (FT) on each column of M1(A) and M1(B) to obtain velocity matrices M2(A) and M2(B), respectively. The processor cores apply a phase compensation factor to M2(B) to obtain a phase corrected velocity matrix M2(B′), and concatenate M2(A) and M2(B′) to obtain an aggregate velocity matrix M2(A&B′). The processor cores perform a second FT on each row of M2(A&B′) to obtain a range and velocity matrix M3(A&B′).

公开(公告)号：US20250080776A1

公开(公告)日：2025-03-06

申请号：US18950554

申请日：2024-11-18

Applicant: Texas Instruments Incorporated

Inventor： Mangesh Devidas Sadafale

IPC: H04N19/86 ,  H04N19/117 ,  H04N19/134 ,  H04N19/176 ,  H04N19/186

Abstract: Several systems, methods and integrated circuits capable of reducing blocking artifacts in video data are disclosed. In an embodiment, a system for reducing blocking artifacts in video data includes a processing module and a deblocking module. The deblocking module comprises a luma deblocking filter and a chroma deblocking filter configured to filter an edge between adjacent blocks associated with the video data, where a block of the adjacent blocks corresponds to one of a prediction block and a transform block. The processing module is communicatively associated with the deblocking module and is operable to configure at least one filter coefficient corresponding to the chroma deblocking filter based on one or more filter coefficients corresponding to the luma deblocking filter. The processing module is further configured to cause the chroma deblocking filter to filter the edge between the adjacent blocks based on the configured at least one filter coefficient.