公开(公告)号：US20230196497A1

公开(公告)日：2023-06-22

申请号：US17556161

申请日：2021-12-20

申请人： TEXAS INSTRUMENTS INCORPORATED

发明人： Mihir Narendra MODY ,  Niraj NANDAN ,  Ankur ANKUR ,  Mayank MANGLA ,  Prithvi Shankar YEYYADI ANANTHA

IPC分类号： G06T1/20 ,  G06T1/60 ,  G06F11/10 ,  G06F9/48

CPC分类号： G06T1/20 ,  G06T1/60 ,  G06F11/1004 ,  G06F9/4812

摘要： A technique including receiving an image stream for processing; processing the received image stream in a real time mode of operation; outputting an indication that an image processing pipeline has begun processing the received image stream; receiving, in response to the indication, first configuration information associated with test data for testing the image processing pipeline; switching the image processing pipeline to a non-real time mode of operation to process the test data based on the first configuration information during a vertical blanking period of the received image stream; loading the test data from an external memory; switching an input of the image processing pipeline from the image stream to the test data; determining a checksum based on the processed test data; comparing the determined checksum to an expected checksum to determine that the test data was successfully processed; and outputting an indication that the test data was successfully processed.

公开(公告)号：US20220114120A1

公开(公告)日：2022-04-14

申请号：US17558252

申请日：2021-12-21

申请人： TEXAS INSTRUMENTS INCORPORATED

发明人： Mihir MODY ,  Niraj NANDAN ,  Hetul SANGHVI ,  Brian CHAE ,  Rajasekhar Reddy ALLU ,  Jason A.T. JONES ,  Anthony LELL ,  Anish REGHUNATH

IPC分类号： G06F13/16 ,  G06T1/20 ,  H04N5/765 ,  G06F13/28

摘要： A processing accelerator includes a shared memory, and a stream accelerator, a memory-to-memory accelerator, and a common DMA controller coupled to the shared memory. The stream accelerator is configured to process a real-time data stream, and to store stream accelerator output data generated by processing the real-time data stream in the shared memory. The memory-to-memory accelerator is configured to retrieve input data from the shared memory, to process the input data, and to store, in the shared memory, memory-to-memory accelerator output data generated by processing the input data. The common DMA controller is configured to retrieve stream accelerator output data from the shared memory and transfer the stream accelerator output data to memory external to the processing accelerator; and to retrieve the memory-to-memory accelerator output data from the shared memory and transfer the memory-to-memory accelerator output data to memory external to the processing accelerator.

公开(公告)号：US20210209722A1

公开(公告)日：2021-07-08

申请号：US16909710

申请日：2020-06-23

申请人： TEXAS INSTRUMENTS INCORPORATED

发明人： Niraj NANDAN ,  Rajasekhar Reddy ALLU ,  Mihir Narendra MODY

IPC分类号： G06T1/60 ,  G06F9/50 ,  G06F9/54

摘要： A lens distortion correction function operates by backmapping output images to the uncorrected, distorted input images. As a vision image processor completes processing on the image data lines needed for the lens distortion correction function to operate on a group of output, undistorted image lines, the lens distortion correction function begins processing the image data. This improves image processing pipeline delays by overlapping the operations. The vision image processor provides output image data to a circular buffer in SRAM, rather than providing it to DRAM. The lens distortion correction function operates from the image data in the circular buffer. By operating from the SRAM circular buffer, access to the DRAM for the highly fragmented backmapping image data read operations is removed, improving available DRAM bandwidth. By using a circular buffer, less space is needed in the SRAM. The improved memory operations further improve the image processing pipeline delays.

公开(公告)号：US20240031704A1

公开(公告)日：2024-01-25

申请号：US18091798

申请日：2022-12-30

申请人： TEXAS INSTRUMENTS INCORPORATED

发明人： Niraj NANDAN ,  Mihir Narendra MODY ,  Rajasekhar ALLU

IPC分类号： H04N25/77

CPC分类号： H04N25/77

摘要： In an example, a method includes receiving image data of an input image having lines therein. The method also includes storing a first portion of the image data in a circular buffer in a first memory, wherein the first portion begins at a circular buffer start line in the input image and ends at a circular buffer end line in the input image. The method includes storing a second portion of the image data in a linear buffer in a second memory, where the second portion is non-overlapping with the first portion. The method includes processing the second portion of the image data to produce a first block of an output image. The method includes processing the first portion of the image data to produce a second block of the output image.

公开(公告)号：US20230336887A1

公开(公告)日：2023-10-19

申请号：US18343018

申请日：2023-06-28

申请人： TEXAS INSTRUMENTS INCORPORATED

发明人： Gang HUA ,  Rajasekhar Reddy ALLU ,  Mihir Narendra MODY ,  Niraj NANDAN ,  Mayank MANGLA ,  Pandy KALIMUTHU

IPC分类号： H04N25/611 ,  G06T3/40 ,  G06T1/60 ,  H04N25/13

CPC分类号： H04N25/611 ,  G06T3/4015 ,  G06T1/60 ,  H04N25/13

摘要： In an advanced driver-assistance system (ADAS), RAW sensor image processing for a machine vision (MV) application is important. Due to different color, e.g., red/green/blue (RGB), color components, being focused by the lens at different locations in image plane, the lateral chromatic aberration phenomenon may sometimes be observed, which causes false color around edges in the final image output, especially for high contrast edges, which can impede MV applications. Disclosed herein are low-latency, efficient, optimized designs for chromatic aberration correction (CAC) components. An in-pipeline CAC design may be used to perform on-the-fly CAC without any out-of-pipeline memory traffic; enable use of wide dynamic range (WDR) sensors; uses bicubic interpolation; support vertical and horizontal chromatic aberration color channel offsets, reduce CAC line memory requirements, and support flexible look-up table (LUT) down-sampling factors to improve the spatial precision of correction and accommodate popular image sensor resolutions.

公开(公告)号：US20200210351A1

公开(公告)日：2020-07-02

申请号：US16234508

申请日：2018-12-27

申请人： TEXAS INSTRUMENTS INCORPORATED

发明人： Mihir MODY ,  Niraj NANDAN ,  Hetul SANGHVI ,  Brian CHAE ,  Rajasekhar Reddy ALLU ,  Jason A.T. JONES ,  Anthony LELL ,  Anish REGHUNATH

IPC分类号： G06F13/16 ,  G06F13/28 ,  H04N5/765 ,  G06T1/20

摘要： A processing accelerator includes a shared memory, and a stream accelerator, a memory-to-memory accelerator, and a common DMA controller coupled to the shared memory. The stream accelerator is configured to process a real-time data stream, and to store stream accelerator output data generated by processing the real-time data stream in the shared memory. The memory-to-memory accelerator is configured to retrieve input data from the shared memory, to process the input data, and to store, in the shared memory, memory-to-memory accelerator output data generated by processing the input data. The common DMA controller is configured to retrieve stream accelerator output data from the shared memory and transfer the stream accelerator output data to memory external to the processing accelerator; and to retrieve the memory-to-memory accelerator output data from the shared memory and transfer the memory-to-memory accelerator output data to memory external to the processing accelerator.

公开(公告)号：US20170161873A1

公开(公告)日：2017-06-08

申请号：US15349609

申请日：2016-11-11

申请人： TEXAS INSTRUMENTS INCORPORATED

发明人： Shashank DABRAL ,  Mihir Narendra MODY ,  Denis BEAUDOIN ,  Niraj NANDAN ,  Gang HUA

IPC分类号： G06T3/40 ,  H04N9/64 ,  H04N9/04

CPC分类号： G06T3/4015 ,  G06T3/403 ,  G06T2207/20012 ,  H04N9/045 ,  H04N2209/046

摘要： A method of de-mosaicing pixel data from an image processor includes generating a pixel block that includes a plurality of image pixels. The method also includes determining a first image gradient between a first set of pixels of the pixel block and a second image gradient between a second set of pixels of the pixel block. The method also includes determining a first adaptive threshold value based on intensity of a third set of pixels of the pixel block. The pixels of the third set of pixels are adjacent to one another. The method also includes filtering the pixel block in a vertical, horizontal, or neutral direction based on the first and second image gradients and the first adaptive threshold value utilizing a plurality of FIR filters to generate a plurality of component images.

公开(公告)号：US20230291864A1

公开(公告)日：2023-09-14

申请号：US17690829

申请日：2022-03-09

申请人： TEXAS INSTRUMENTS INCORPORATED

发明人： Mihir Narendra MODY ,  Brijesh JADAV ,  Gang HUA ,  Niraj NANDAN ,  Rajasekhar Reddy ALLU ,  Ankur ANKUR ,  Mayank MANGLA

IPC分类号： H04N5/262 ,  G06T3/40 ,  G06T7/12 ,  G06T7/60 ,  G06T11/00

CPC分类号： H04N5/2628 ,  G06T3/40 ,  G06T7/12 ,  G06T7/60 ,  G06T11/00

摘要： A technique for determining regions and block sizes for configuring a perspective transformation engine including determining a set of scale ratios for images captured by a camera, generating a scale ratio image based on the set of scale ratios, determining a set of boundary ranges for the scale ratio image, generating a binary scale ratio image using the set of scale ratios of the scale ratio image, determining a set of regions based on the set of boundary ranges for the binary scale ratio image, determining a block size for each region of the determined set of regions, and outputting the determined set of regions and the determined block sizes.

公开(公告)号：US20230267084A1

公开(公告)日：2023-08-24

申请号：US17677638

申请日：2022-02-22

申请人： TEXAS INSTRUMENTS INCORPORATED

发明人： Mihir Narendra MODY, JR. ,  Ankur ANKUR ,  Vivek Vilas DHANDE ,  Kedar Satish CHITNIS ,  Niraj NANDAN ,  Brijesh JADAV ,  Shyam JAGANNATHAN ,  Prithvi Shankar YEYYADI ANANTHA ,  Santhanakrishnan Narayanan NARAYANAN

IPC分类号： G06F13/28 ,  G06F13/16 ,  G06F13/42 ,  G06F15/78 ,  G06F9/48

CPC分类号： G06F13/28 ,  G06F13/1673 ,  G06F13/4221 ,  G06F15/7807 ,  G06F9/4881

摘要： A system-on-chip (SoC) in which trace data is managed includes a first memory device, a first interface to couple the first memory to a second memory external to the system-on-chip, and a first processing resource coupled to the first interface and the first memory device. The first processing resource includes a data buffer and a first direct access memory (DMA) controller. The first DMA controller transmits data from the data buffer to the first interface over a first channel, and transmits the data from the data buffer with associated trace information for the data to the first memory device over a second channel.

公开(公告)号：US20230199339A1

公开(公告)日：2023-06-22

申请号：US17555145

申请日：2021-12-17

申请人： TEXAS INSTRUMENTS INCORPORATED

发明人： Gang HUA ,  Rajasekhar Reddy ALLU ,  Mihir Narendra MODY ,  Niraj NANDAN ,  Mayank MANGLA ,  Pandy KALIMUTHU

IPC分类号： H04N9/04 ,  G06T1/60 ,  G06T3/40

CPC分类号： H04N9/04517 ,  G06T1/60 ,  G06T3/4015 ,  H04N9/04551

摘要： In the advanced driver-assistance systems (ADAS) field, RAW sensor image processing for machine vision (MV) applications can be of critical importance. Due to red/green/blue (RGB) image components being focused by the lens at different locations in image plane, the lateral chromatic aberration (LCA) phenomenon may sometimes be observed, which causes false color around edges in the final image output, especially for high contrast edges, which can impede MV applications. Disclosed herein are low-latency, efficient, optimized designs for chromatic aberration correction (CAC) modules. In some embodiments, an in-pipeline CAC design is used that: is configured to perform on-the-fly CAC without any out-of-pipeline memory traffic; enables use of wide dynamic range (WDR) sensors; uses bicubic interpolation; supports vertical and horizontal chromatic aberration red/blue color channel offsets, reduces CAC line memory requirements, and supports flexible look-up table (LUT) down-sampling factors to improve the spatial precision of correction and accommodate popular image sensor resolutions.