公开(公告)号：US20100267354A1

公开(公告)日：2010-10-21

申请号：US12470789

申请日：2009-05-22

申请人： Ahmad Mirzaei ,  Hooman Darabi ,  John Leete

发明人： Ahmad Mirzaei ,  Hooman Darabi ,  John Leete

IPC分类号： H04B1/10

CPC分类号： H04B1/30 ,  H03D7/1458 ,  H03D7/1466 ,  H03H19/004

摘要： Embodiments of a frequency translated filter (FTF) are presented. An FTF includes a passive mixer and a baseband impedance. The baseband impedance includes a network of one or more passive components (e.g., resistors, inductors, and capacitors) that form a low-Q filter. The passive mixer is configured to translate the baseband impedance to a higher frequency. The translated baseband impedance forms a high-Q filter and is presented at the input of the FTF. The FTF can be fully integrated in CMOS IC technology (or others, e.g., Bipolar, BiCMOS, and SiGe) and applied in wireless receiver systems including GSM, Wideband Code Division Multiple Access (WCDMA), Bluetooth, and wireless LANs (e.g., IEEE 802.11).

摘要翻译： 提出了频率转换滤波器（FTF）的实施例。 FTF包括无源混频器和基带阻抗。 基带阻抗包括形成低Q滤波器的一个或多个无源组件（例如，电阻器，电感器和电容器）的网络。 无源混频器被配置为将基带阻抗转换到更高的频率。 转换的基带阻抗形成高Q滤波器，并在FTF的输入端呈现。 FTF可以完全集成在CMOS IC技术（或其他，例如双极，BiCMOS和SiGe）中，并且应用于包括GSM，宽带码分多址（WCDMA），蓝牙和无线LAN（例如IEEE）的无线接收机系统中 802.11）。

公开(公告)号：US20090017770A1

公开(公告)日：2009-01-15

申请号：US11827310

申请日：2007-07-11

申请人： Ahmad Mirzaei ,  Hooman Darabi ,  Ahmadreza Rofougaran ,  Aminghasem Safarian

发明人： Ahmad Mirzaei ,  Hooman Darabi ,  Ahmadreza Rofougaran ,  Aminghasem Safarian

IPC分类号： H04B1/38

CPC分类号： H04B1/525

摘要： According to one exemplary embodiment, a transceiver providing noise cancellation has a transmitter and a receiver, and comprises a noise cancellation system receiving input from the transmitter. The noise cancellation system generates a noise cancellation signal injected into the receiver such that the noise cancellation signal has an amplitude substantially matching an amplitude of a noise signal in the receiver, and a phase substantially opposite to a phase of the noise signal in the receiver. In one exemplary embodiment, a noise cancellation system comprises a forward injection circuit including a scaling and rotation block, and first and second phase shift and attenuation controllers providing feedback from outputs of the receiver. In one exemplary embodiment, the scaling and rotation block includes first, second, third, and fourth amplifiers to receive a down-converted noise signal and provide a noise cancellation signal.

摘要翻译： 根据一个示例性实施例，提供噪声消除的收发机具有发射机和接收机，并且包括从发射机接收输入的噪声消除系统。 噪声消除系统产生注入到接收机中的噪声消除信号，使得噪声消除信号具有与接收机中的噪声信号的振幅基本一致的幅度，以及与接收机中的噪声信号的相位基本相反的相位。 在一个示例性实施例中，噪声消除系统包括包括缩放和旋转块的正向注入电路以及从接收器的输出提供反馈的第一和第二相移和衰减控制器。 在一个示例性实施例中，缩放和旋转块包括用于接收下变频噪声信号并提供噪声消除信号的第一，第二，第三和第四放大器。

公开(公告)号：US20090002065A1

公开(公告)日：2009-01-01

申请号：US11823079

申请日：2007-06-26

申请人： Ahmad Mirzaei ,  Hooman Darabi

发明人： Ahmad Mirzaei ,  Hooman Darabi

IPC分类号： H04B1/10

CPC分类号： H03F3/45183 ,  H03F3/19 ,  H03F2200/336 ,  H03F2200/451 ,  H03F2203/45368 ,  H03F2203/45704

摘要： According to one exemplary embodiment, a buffer circuit for reducing differential-mode phase noise and quadrature phase error comprises first and second switching branches driven by an in-phase (I) signal, third and fourth switching branches driven by a quadrature-phase (Q) signal, the first and second switching branches and third and fourth switching branches being coupled to a common bias current source to reduce the differential-mode phase noise and quadrature phase error at an output of the buffer circuit. In one embodiment, the switching branches may be loaded by first, second, third, and fourth resonators formed, for example, by L-C circuits tuned to a local oscillator frequency. In one embodiment, the buffer circuit may comprise switching branches formed by FETs, and be used in conjunction with a local oscillator and mixer circuits to down-convert a radio frequency (RF) signal, in a receiving system, for example.

摘要翻译： 根据一个示例性实施例，用于减小差模相位噪声和正交相位误差的缓冲电路包括由同相（I）信号驱动的第一和第二开关分支，由正交相（Q）驱动的第三和第四开关分支 ）信号，第一和第二开关分支以及第三和第四开关分支耦合到公共偏置电流源，以减小缓冲电路的输出处的差模相位噪声和正交相位误差。 在一个实施例中，开关分支可以由例如由调谐到本地振荡器频率的L-C电路形成的第一，第二，第三和第四谐振器来加载。 在一个实施例中，缓冲电路可以包括由FET形成的开关支路，并且例如在接收系统中与本地振荡器和混频器电路结合使用以降低转换射频（RF）信号。

公开(公告)号：US20080299935A1

公开(公告)日：2008-12-04

申请号：US11888784

申请日：2007-08-02

申请人： Aminghasem Safarian ,  Hooman Darabi ,  Ahmad Mirzaei ,  Ahmadreza (Reza) Rofougaran ,  Maryam Rofougaran

发明人： Aminghasem Safarian ,  Hooman Darabi ,  Ahmad Mirzaei ,  Ahmadreza (Reza) Rofougaran ,  Maryam Rofougaran

IPC分类号： H04B1/26

CPC分类号： H04B1/525

摘要： An IC includes an RF front end, a down conversion module, an up conversion module, and a local oscillation generating module. The RF front end includes a receive section, a transmit section, and an interference reduction module. The receive section receives an inbound RF signal within a receive frequency band and the transmit section transmits an outbound RF signal within a transmit frequency band. The interference reduction module is coupled to at least one of the receive section and the transmit section and facilitates at least one of: attenuating energy of the outbound RF signal within the receive frequency band based on a transmit local oscillation or a receive local oscillation; and attenuating energy of the inbound RF signal within the transmit frequency band based on the transmit local oscillation or the receive local oscillation.

摘要翻译： IC包括RF前端，下变频模块，上变频模块和本地振荡产生模块。 RF前端包括接收部分，发送部分和干扰减少模块。 接收部分在接收频带内接收入站RF信号，并且发送部分发送发射频带内的出站RF信号。 所述干扰减少模块耦合到所述接收部分和所述发射部分中的至少一个，并且促进以下至少一个：基于发射本地振荡或接收本地振荡来衰减所述接收频带内的出站RF信号的能量; 并且基于发射本地振荡或接收本地振荡来衰减发射频带内的入站RF信号的能量。

公开(公告)号：US20080287087A1

公开(公告)日：2008-11-20

申请号：US11804535

申请日：2007-05-17

申请人： Ahmad Mirzaei ,  Hooman Darabi

发明人： Ahmad Mirzaei ,  Hooman Darabi

IPC分类号： H04B1/26

CPC分类号： H03D7/1441 ,  H03D7/1433 ,  H03D7/1483 ,  H03D2200/0043

摘要： According to one exemplary embodiment, a mixer circuit comprises first and second switching branches driven by a local oscillator and an input radio frequency (RF) signal. The mixer circuit further comprises at least one capacitor coupled between the first and second switching branches for high-pass filtering of a down-converted output signal of the mixer circuit. In one embodiment, each switching branch comprises a respective mixer transistor, for example, a field effect transistor (FET). In one embodiment, the mixer circuit includes an inductor to reduce or eliminate the effects of parasitic capacitors at a resonance frequency selected to approximately match a desired RF signal frequency. In one embodiment, an inductor at resonance with parasitic capacitors produces a band pass filter for an input RF signal.

摘要翻译： 根据一个示例性实施例，混频器电路包括由本地振荡器和输入射频（RF）信号驱动的第一和第二开关分支。 混频器电路还包括耦合在第一和第二开关分支之间的至少一个电容器，用于对混频器电路的下变频输出信号进行高通滤波。 在一个实施例中，每个开关支路包括相应的混频器晶体管，例如场效应晶体管（FET）。 在一个实施例中，混频器电路包括电感器，以减少或消除在被选择为近似匹配期望的RF信号频率的谐振频率处的寄生电容器的影响。 在一个实施例中，与寄生电容共振的电感器产生用于输入RF信号的带通滤波器。

公开(公告)号：US08331881B2

公开(公告)日：2012-12-11

申请号：US12696845

申请日：2010-01-29

申请人： Dmitriy Rozenblit ,  Ahmad Mirzaei

发明人： Dmitriy Rozenblit ,  Ahmad Mirzaei

IPC分类号： H01Q11/12

CPC分类号： H04B1/04

摘要： Embodiments enable a multi-band transmitter with significantly reduced architecture area by allowing maximum reuse of transmitter stages across supported frequency bands and signal standards. Further, embodiments allow a monolithic transmitter implementation by providing an integration-friendly differential to single-ended conversion stage. According to embodiments, the differential to single-ended conversion stage is readily configurable according to the frequency band and signal standard of operation of the transmitter.

摘要翻译： 通过允许在所支持的频带和信号标准上的发射机级的最大重用，实施例使得具有显着降低的架构区域的多频带发射机。 此外，实施例允许通过向单端转换级提供集成友好的差分来实现单片发射机。 根据实施例，差分到单端转换级可以根据发射机的频带和信号标准容易地配置。

公开(公告)号：US07298183B2

公开(公告)日：2007-11-20

申请号：US11142705

申请日：2005-06-01

申请人： Ahmad Mirzaei ,  Mohammad E Heidari ,  Masoud Djafari ,  Rahim Bagheri

发明人： Ahmad Mirzaei ,  Mohammad E Heidari ,  Masoud Djafari ,  Rahim Bagheri

IPC分类号： H03K21/00

CPC分类号： H03K23/52 ,  H03K3/012 ,  H03K3/356 ,  H03K23/44

摘要： Embodiments of the present invention include circuits and methods for dividing high frequency signals. In one embodiment the present invention includes a divider circuit comprising a differential circuit having first and second inputs to receive a first differential signal, a first frequency control input and first and second differential outputs, wherein the differential circuit has a first bias current. The divider circuit further includes a cross-coupled circuit having outputs coupled to the differential circuit outputs and a second frequency control input, wherein the cross-coupled circuit has a second bias current. Embodiments of the present invention may include circuits for controlling the relationship between bias currents and circuit parameters that vary with process or temperature or both.

摘要翻译： 本发明的实施例包括用于分割高频信号的电路和方法。 在一个实施例中，本发明包括一个分频器电路，包括具有第一和第二输入以接收第一差分信号的差分电路，第一频率控制输入和第一和第二差分输出，其中差分电路具有第一偏置电流。 除法器电路还包括具有耦合到差分电路输出和第二频率控制输入的输出的交叉耦合电路，其中交叉耦合电路具有第二偏置电流。 本发明的实施例可以包括用于控制偏置电流和随过程或温度变化的电路参数之间的关系或两者的电路。

公开(公告)号：US07522898B2

公开(公告)日：2009-04-21

申请号：US11142690

申请日：2005-06-01

申请人： Mohammad E Heidari ,  Ahmad Mirzaei ,  Masoud Djafari ,  Mike Choi ,  Filipp A Baron ,  Alireza Mehrnia ,  Rahim Bagheri

发明人： Mohammad E Heidari ,  Ahmad Mirzaei ,  Masoud Djafari ,  Mike Choi ,  Filipp A Baron ,  Alireza Mehrnia ,  Rahim Bagheri

IPC分类号： H04B7/00

CPC分类号： H03L7/183 ,  H03D7/1441 ,  H03D7/1458 ,  H03D7/1483 ,  H03D7/165 ,  H03D2200/0043 ,  H03L7/0891

摘要： Embodiments of the present invention include a frequency synthesizer comprising a first plurality of dividers receiving a first signal having a first frequency and generating a first plurality of divided signals and a frequency combination network including a plurality of mixers, the frequency combination network receiving one or more of the first plurality of divided signals and generating a plurality of synthesized signals having different frequencies. The frequency combination network may further include additional dividers and multiplexers for more flexibility in synthesizing different frequencies. In one embodiment, the frequency combination network is coupled to dividers in the feedback path of a phase locked loop. The present invention is particularly advantageous for synthesizing frequencies above one (1) gigahertz.

摘要翻译： 本发明的实施例包括频率合成器，其包括接收具有第一频率的第一信号和产生第一多个分频信号的第一多个分频器和包括多个混频器的频率组合网络，所述频率组合网络接收一个或多个 并产生具有不同频率的多个合成信号。 频率组合网络还可以包括附加的分频器和多路复用器，用于在合成不同频率时更灵活。 在一个实施例中，频率组合网络耦合到锁相环的反馈路径中的分频器。 本发明特别有利于合成高于一（1）吉赫兹的频率。

公开(公告)号：US20080122529A1

公开(公告)日：2008-05-29

申请号：US11501382

申请日：2006-08-09

申请人： Rahim Bagheri ,  Ahmad Mirzaei

发明人： Rahim Bagheri ,  Ahmad Mirzaei

IPC分类号： H04B1/10

CPC分类号： H03H15/02

摘要： Embodiments of the present invention include programmable filter circuits and methods. In one embodiment, the present invention includes a programmable filter for filtering an input signal comprising a storage element for storing a plurality of digital values representing a discrete time window function, and a plurality of filter channels, each channel comprising a multiplying digital-to-analog converter having a plurality of digital inputs coupled to the storage element and an analog input for receiving said input signal to be filtered, at least one capacitor having at least one terminal coupled to an output of the multiplying digital-to-analog converter, and a sampling device coupled between the at least one terminal of the at least one capacitor and an output of the filter. In another embodiment, the present invention includes a software defmed radio.

摘要翻译： 本发明的实施例包括可编程滤波器电路和方法。 在一个实施例中，本发明包括一个可编程滤波器，用于对输入信号进行滤波，该输入信号包括用于存储表示离散时间窗函数的多个数字值的存储元件和多个滤波器通道，每个通道包括乘法数字 - 模拟转换器，其具有耦合到存储元件的多个数字输入端和用于接收要滤波的所述输入信号的模拟输入端，至少一个电容器，其至少一个端子耦合到乘法数模转换器的输出端，以及 耦合在所述至少一个电容器的所述至少一个端子和所述滤波器的输出端之间的采样装置。 在另一个实施例中，本发明包括一个软件无线电装置。

公开(公告)号：US07941475B2

公开(公告)日：2011-05-10

申请号：US11501382

申请日：2006-08-09

申请人： Rahim Bagheri ,  Ahmad Mirzaei

发明人： Rahim Bagheri ,  Ahmad Mirzaei

IPC分类号： G06G7/02

CPC分类号： H03H15/02

摘要： Embodiments of the present invention include programmable filter circuits and methods. In one embodiment, the present invention includes a programmable filter for filtering an input signal comprising a storage element for storing a plurality of digital values representing a discrete time window function, and a plurality of filter channels, each channel comprising a multiplying digital-to-analog converter having a plurality of digital inputs coupled to the storage element and an analog input for receiving said input signal to be filtered, at least one capacitor having at least one terminal coupled to an output of the multiplying digital-to-analog converter, and a sampling device coupled between the at least one terminal of the at least one capacitor and an output of the filter. In another embodiment, the present invention includes a software defined radio.

摘要翻译： 本发明的实施例包括可编程滤波器电路和方法。 在一个实施例中，本发明包括一个可编程滤波器，用于对输入信号进行滤波，该输入信号包括用于存储表示离散时间窗函数的多个数字值的存储元件和多个滤波器通道，每个通道包括乘法数字 - 模拟转换器，其具有耦合到存储元件的多个数字输入端和用于接收要滤波的所述输入信号的模拟输入端，至少一个电容器，其至少一个端子耦合到乘法数模转换器的输出端，以及 耦合在所述至少一个电容器的所述至少一个端子和所述滤波器的输出端之间的采样装置。 在另一个实施例中，本发明包括软件定义的无线电装置。