公开(公告)号：US4586181A

公开(公告)日：1986-04-29

申请号：US551429

申请日：1983-11-14

申请人： Masao Shimizu

发明人： Masao Shimizu

IPC分类号： G01R31/28 ,  G01R31/3183 ,  G01R31/319

CPC分类号： G01R31/31921

摘要： A test pattern generator includes means for reading out a plurality of memories non-successively while outputting the test patterns stored identically in the addresses of the memories, such as for sequentially repeating the test patterns that are provided to a logic circuit being tested. The sequence of test patterns is determined by a series of instructions which are accessed by a program counter, and the instructions can cause a jump in the counting of the program counter, for instance to repeat addresses of the memories for repeating a desired sequence of test patterns a predetermined number of times. The timing of the addressing of the memories for the reading out of the test patterns can be faster than the timing for writing the test patterns into the memories for storage.

摘要翻译： 测试图形发生器包括用于在输出在存储器的地址中相同存储的测试图案的同时非连续读出多个存储器的装置，例如用于顺序重复提供给被测试的逻辑电路的测试图案。 测试图案的顺序由程序计数器访问的一系列指令确定，并且指令可以导致程序计数器的计数中的跳转，例如重复存储器的地址以重复所需的测试序列 模式预定次数。 用于读出测试图案的存储器寻址的定时可以比将测试图案写入存储器的时间更快。

公开(公告)号：US4555663A

公开(公告)日：1985-11-26

申请号：US552374

申请日：1983-11-16

申请人： Masao Shimizu

发明人： Masao Shimizu

IPC分类号： G01R31/28 ,  G01R31/3183 ,  G01R31/319 ,  G06F11/00

CPC分类号： G01R31/31908

摘要： A word of a test pattern is divided into blocks and stored in a storage device of a test pattern generator for testing a logic device. The test pattern blocks are sequentially provided to respective blocks of a pattern generator, which provides at respective outputs all of the blocks of a test pattern word at the same time. If a block of the pattern generator is faulty, or if another component of the test pattern generator corresponding to a block of the pattern generator is faulty, the respective block of each test pattern word can be provided to an unused block of the pattern generator, for providing the test patterns for testing the logic device without the need for reprogramming the test pattern blocks to be stored in the storage device. The data stored in the storage device identifies the position of each respective block of the test pattern words, for controlling the transferring of the test pattern blocks from the storage device to the pattern generator.

摘要翻译： 测试模式的字被分成块并存储在用于测试逻辑设备的测试码型发生器的存储设备中。 测试图案块被顺序地提供给模式生成器的各个块，它们在相应的输出端同时提供测试模式字的所有块。 如果模式发生器的块有故障，或者如果与模式发生器的块相对应的测试码型发生器的另一个组件有故障，则可以将每个测试模式字的相应块提供给模式生成器的未使用块， 用于提供用于测试逻辑器件的测试模式，而不需要重新编程要存储在存储设备中的测试模式块。 存储在存储装置中的数据识别测试图案字的每个相应块的位置，用于控制将测试图案块从存储装置传送到图案生成器。

公开(公告)号：US4300234A

公开(公告)日：1981-11-10

申请号：US83527

申请日：1979-10-10

申请人： Hiromi Maruyama ,  Takashi Tokuno ,  Masao Shimizu ,  Kohji Ishikawa ,  Naoaki Narumi ,  Osamu Ohguchi

发明人： Hiromi Maruyama ,  Takashi Tokuno ,  Masao Shimizu ,  Kohji Ishikawa ,  Naoaki Narumi ,  Osamu Ohguchi

IPC分类号： G06F11/22 ,  G01R31/3181 ,  G01R31/3183 ,  G11C8/00 ,  G11C29/10 ,  G11C29/56 ,  G01R31/28

CPC分类号： G11C29/56 ,  G01R31/31813

摘要： An address pattern generator for use in a test pattern generator for generating various patterns for testing semiconductor memories. A plurality of fixed registers for storing an initial value at the start of a test, a boundary value and an operand indicating the amount of change of an address are provided in common to at least two address operating circuits. The address operating circuits are each capable of taking therein the content of a desired one of the fixed registers. At least two output registers are provided, which are each capable of taking therein the operation result of a desired one of the address operating circuit. The contents of these output registers are supplied as addresses to a memory under test.

摘要翻译： 一种用于测试图形发生器的地址模式发生器，用于产生用于测试半导体存储器的各种模式。 多个固定寄存器用于在测试开始时存储初始值，边界值和指示地址变化量的操作数被共同地提供给至少两个地址操作电路。 地址操作电路各自能够在其中接收期望的一个固定寄存器的内容。 提供至少两个输出寄存器，每个输出寄存器能够在其中接收所需地址操作电路的操作结果。 这些输出寄存器的内容作为地址提供给被测内存。

公开(公告)号：US4293950A

公开(公告)日：1981-10-06

申请号：US26246

申请日：1979-04-02

申请人： Masao Shimizu ,  Takashi Tokuno ,  Kohji Ishikawa ,  Naoaki Narumi ,  Osamu Ohguchi

发明人： Masao Shimizu ,  Takashi Tokuno ,  Kohji Ishikawa ,  Naoaki Narumi ,  Osamu Ohguchi

IPC分类号： G01R31/3181 ,  G01R31/319 ,  G11C29/10 ,  G11C29/56 ,  G06F11/00 ,  G01R31/28

CPC分类号： G01R31/31921 ,  G11C29/10 ,  G11C29/56 ,  G01R31/31813

摘要： A test pattern generating apparatus in which a microprogram describing a test pattern to be generated is read for interpretation and execution, address and data patterns are generated by arithmetic operations and a memory control signal is produced, the address and data patterns and the memory control signal being applied to a memory under test. The address pattern is provided to an area inversion control signal generation section to produce an inversion control signal corresponding to the address pattern, by which the data pattern may be inverted and then outputted.

摘要翻译： 读取描述要生成的测试图案的微程​​序的测试图形生成装置，用于解释和执行，地址和数据模式通过算术运算产生，并且产生存储器控制信号，地址和数据模式以及存储器控制信号 被应用于被测记忆体。 地址模式被提供给区域反转控制信号产生部分，以产生对应于地址模式的反转控制信号，由此可以将数据模式反转并输出。

公开(公告)号：US08730248B2

公开(公告)日：2014-05-20

申请号：US11805165

申请日：2007-05-22

申请人： Nobuo Sasaki ,  Masao Shimizu

发明人： Nobuo Sasaki ,  Masao Shimizu

IPC分类号： G06F15/16 ,  G09G5/399 ,  G09G5/36

CPC分类号： G06T1/20 ,  G06F9/3879

摘要： A multi-graphics processor system includes a CPU; a first GPU connected to the CPU via an input/output interface; and a second GPU connected to the first GPU via a second-GPU interface. The first GPU is provided with a second-GPU bus for communicating the CPU and the second GPU via the second-GPU interface. The CPU communicates with the second GPU via the second-GPU bus after receiving a signal indicating the timing of the data communication.

摘要翻译： 多图形处理器系统包括CPU; 通过输入/输出接口连接到CPU的第一个GPU; 以及经由第二GPU接口连接到第一GPU的第二GPU。 第一GPU具有第二GPU总线，用于经由第二GPU接口来通信CPU和第二GPU。 在接收到指示数据通信的定时的信号之后，CPU经由第二GPU总线与第二GPU进行通信。

公开(公告)号：US20140113055A1

公开(公告)日：2014-04-24

申请号：US14116582

申请日：2012-05-18

申请人： Katsuyoshi Saito ,  Masao Shimizu

发明人： Katsuyoshi Saito ,  Masao Shimizu

IPC分类号： A23D7/005

CPC分类号： A23D7/005 ,  A23D9/013 ,  C11C3/02

摘要： Provided is an oil or fat composition rich in diacylglycerol, including a high content of oleic acid in a constituent fatty acid thereof and having a good appearance at normal temperature. Specifically, the oil or fat composition satisfies the following items (1) to (4): (1) the oil or fat composition includes diacylglycerol in an amount of 20 mass % or more; (2) constituent fatty acids of the diacylglycerol include oleic acid in an amount of 30 mass % or more; (3) the mass ratio of the content of (B) 1,3-dipalmitin diacylglycerol to the content of (A) 1,2-dipalmitin diacylglycerol, [(B)/(A)], in the diacylglycerol is 1.45 or less; and (4) the mass ratio of the content of (D) 1,3-diacylglycerol to the content of (C) 1,2-diacylglycerol, [(D)/(C)], in the diacylglycerol is 1.2 or more.

摘要翻译： 本发明提供一种富含二酰基甘油的油脂组合物，其组成脂肪酸中含有高含量的油酸并且在常温下具有良好的外观。 具体而言，油脂组合物满足下述（1）〜（4）：（1）油脂组合物含有20质量％以上的二酰基甘油， （2）二酰基甘油的构成脂肪酸的含量为30质量％以上的油酸， （3）二酰基甘油中（B）1,3-二棕榈酸二酰甘油的含量与（A）1,2-二棕榈精二酰基甘油的含量（[（B）/（A）]的质量比为1.45以下 ; 和（4）二酰基甘油中（D）1,3-二酰基甘油的含量与（C）1,2-二酰基甘油的含量（[（D）/（C）]的质量比为1.2以上。

公开(公告)号：US08294778B2

公开(公告)日：2012-10-23

申请号：US12323698

申请日：2008-11-26

申请人： Masatoshi Okutomi ,  Masao Shimizu ,  Takahiro Yano

发明人： Masatoshi Okutomi ,  Masao Shimizu ,  Takahiro Yano

IPC分类号： H04N5/228 ,  H04N5/232 ,  G03B13/00 ,  G06K9/62 ,  G06K9/64

CPC分类号： G02B7/365 ,  G06T7/37

摘要： An image processor includes a frequency transformation unit configured to perform frequency transformation processing with respect to a multiple image, and an inter-superimposed-image displacement acquisition unit that calculates a displacement amount between images forming superimposed images included in the multiple image by using a frequency-transformed image subjected to the frequency transformation processing by the frequency transformation unit.

摘要翻译： 一种图像处理器包括：频率变换单元，被配置为对多个图像执行频率变换处理;以及帧间叠加图像位移获取单元，其通过使用频率来计算形成包括在所述多个图像中的叠加图像的图像之间的位移量 经变频单元进行频率变换处理的变换图像。

公开(公告)号：US08227010B2

公开(公告)日：2012-07-24

申请号：US12249331

申请日：2008-10-10

申请人： Minoru Kase ,  Masao Shimizu ,  Junya Moriwaki

发明人： Minoru Kase ,  Masao Shimizu ,  Junya Moriwaki

IPC分类号： A23D9/007 ,  A23D9/02 ,  C11B3/10

CPC分类号： C12P7/6454 ,  A23D9/013 ,  C11B3/10 ,  C11C1/04 ,  C11C1/045 ,  C11C1/08 ,  C11C3/02 ,  C12P7/6418

摘要： The present invention relates to a process for producing oils and fats rich in diacylglycerol by subjecting fatty acids which are obtainable by hydrolyzing raw material oils and fats, to esterification with glycerin, wherein the process comprises decreasing an anisidine value of greater than 6 of the raw material oils and fats or reaction intermediates, by 20% or more. By using the process of the present invention, even in the case of using a raw material having an anisidine value which is likely to increase in the production processes for raw material oils and fats or for oils and fats rich in diacylglycerol, the stability of the final product oils and fats rich in diacylglycerol is enhanced, and coloration is suppressed, so that products having excellent external appearance can be obtained.

摘要翻译： 本发明涉及一种通过将可通过水解原料油和脂肪获得的脂肪酸与甘油进行酯化来生产富含二酰基甘油的油脂的方法，其中该方法包括降低大于6的原料的茴香胺值 材料油和脂肪或反应中间体，减少20％以上。 通过使用本发明的方法，即使在使用原料油和脂肪的生产方法中可能增加的茴香胺值的原料或富含二酰基甘油的油脂的情况下， 富含二酰基甘油的最终产品油和脂肪被增强，并且着色被抑制，从而可以获得具有优异外观的产品。

公开(公告)号：US08158969B2

公开(公告)日：2012-04-17

申请号：US11435975

申请日：2006-05-18

申请人： Sukekazu Aratani ,  Hajime Murakami ,  Masao Shimizu ,  Kazuhito Masuda

发明人： Sukekazu Aratani ,  Hajime Murakami ,  Masao Shimizu ,  Kazuhito Masuda

IPC分类号： H01L51/54

CPC分类号： H01L51/5234 ,  H01L51/0067 ,  H01L51/5048 ,  H01L2251/5315

摘要： The present invention is intended to provide a top emission type organic light emitting display device which prevents the organic film from being oxidized during the formation of the upper transparent electrode and can emit light at a low voltage. The top emission type organic light emitting display device includes: a substrate; an organic light emitting layer; and upper and lower electrodes sandwiching the organic light emitting layer, where the lower electrode is arranged between the substrate and the organic light emitting layer, the upper electrode is arranged on the opposite side of the substrate with respect to the lower electrode, light emitted from the organic light emitting layer is taken out from the upper electrode side, and an organic layer which is mainly composed of an organic material having a heterocyclic group containing one or more nitrogen atoms, is included between the organic light emitting layer and the upper electrode.

摘要翻译： 本发明旨在提供一种顶部发射型有机发光显示装置，其防止在形成上部透明电极期间有机膜被氧化并能够以低电压发光。 顶部发射型有机发光显示装置包括：基板; 有机发光层; 以及夹着有机发光层的上下电极，其中下电极布置在基板和有机发光层之间，上电极相对于下电极布置在基板的相对侧，从 有机发光层从上电极侧取出，有机发光层和上电极之间包含主要由含有一个或多个氮原子的杂环基的有机材料构成的有机层。

公开(公告)号：US07943963B2

公开(公告)日：2011-05-17

申请号：US11056447

申请日：2005-02-10

申请人： Hajime Murakami ,  Masao Shimizu ,  Sukekazu Aratani ,  Etsuko Nishimura ,  Masahiro Tanaka

发明人： Hajime Murakami ,  Masao Shimizu ,  Sukekazu Aratani ,  Etsuko Nishimura ,  Masahiro Tanaka

IPC分类号： H01L33/00

CPC分类号： H01L51/5088 ,  H01L27/3244 ,  H01L51/006 ,  H01L51/0078 ,  H01L51/0081 ,  H01L51/5092 ,  H01L2251/5315

摘要： The present invention provides a top emission type organic light-emitting display device in a production of which it is possible to prevent the organic film from being oxidized when the upper transparent electrode is formed, and which is capable of emitting light at a low voltage. This organic light-emitting display device contains an organic light-emitting layer and an upper electrode and a lower electrode sandwiching the organic light-emitting layer, and is of a structure in which the emitted light is taken out from the upper electrode side, and a buffer layer mainly made of an oxide producing less oxygen by decomposition in the film-forming process than the upper electrode material is provided between the organic light-emitting layer and the upper electrode.

摘要翻译： 本发明提供一种能够防止在形成上部透明电极时有机膜被氧化并且能够以低电压发光的生产中的顶部发射型有机发光显示装置。 该有机发光显示装置含有有机发光层和夹着有机发光层的上部电极和下部电极，并且具有从上部电极侧取出发光的结构， 在有机发光层与上部电极之间设置有主要由成膜工艺中的分解产生的氧的氧化物主要由上部电极材料构成的缓冲层。