公开(公告)号：US07387926B2

公开(公告)日：2008-06-17

申请号：US11148212

申请日：2005-06-09

申请人： Chang Hun Han

发明人： Chang Hun Han

IPC分类号： H01L21/8238 ,  H01L21/00 ,  H01L21/302 ,  H01L21/469

CPC分类号： H01L27/14609 ,  H01L27/14689

摘要： A method for manufacturing a CMOS image sensor is provided. The method includes forming a gate electrode on a semiconductor layer having defined regions of a photodiode region and a logic region, such that a gate oxide film is interposed between the semiconductor layer and the gate electrode; forming sidewall insulating films at both sides of the gate electrode, followed by forming a salicide-preventing film over an overall surface of the gate electrode and insulating films; removing the salicide-preventing film formed in the logic region; and removing a portion of the sidewall insulating films exposed by removing the salicide-preventing film, thereby exposing an upper side surface of the gate electrode.

摘要翻译： 提供了一种用于制造CMOS图像传感器的方法。 该方法包括在具有光电二极管区域和逻辑区域的限定区域的半导体层上形成栅电极，使得栅极氧化膜插入在半导体层和栅电极之间; 在栅电极的两侧形成侧壁绝缘膜，然后在栅电极和绝缘膜的整个表面上形成防止防止防水膜; 去除形成在逻辑区域中的防自杀剂膜; 以及通过去除防止自杀化膜的方法去除暴露的侧壁绝缘膜的一部分，从而露出栅电极的上侧表面。

公开(公告)号：US20080042170A1

公开(公告)日：2008-02-21

申请号：US11842200

申请日：2007-08-21

申请人： Chang Hun Han

发明人： Chang Hun Han

IPC分类号： H01L27/146 ,  H01L21/8234

CPC分类号： H01L27/14643 ,  H01L27/14689

摘要： An image sensor and fabricating method thereof are provided. A gate electrode is formed on a semiconductor substrate with a photodiode on one side and a low-concentration drain on the other side. A silicide blocking pattern covers the photodiode, the gate electrode, and part of the low-concentration drain, such that an aperture exposes a portion of the low-concentration drain. A high-concentration drain is formed in the substrate under the aperture.

摘要翻译： 提供了一种图像传感器及其制造方法。 栅极电极形成在半导体衬底上，其一侧具有光电二极管，另一侧形成低浓度漏极。 硅化物阻挡图案覆盖光电二极管，栅电极和低浓度漏极的一部分，使得孔径暴露低浓度漏极的一部分。 在孔下面的基板中形成高浓度排水。

公开(公告)号：US07232712B2

公开(公告)日：2007-06-19

申请号：US10975200

申请日：2004-10-28

申请人： Chang Hun Han

发明人： Chang Hun Han

IPC分类号： H01L21/339

CPC分类号： H01L27/14689 ,  H01L27/1463 ,  H01L27/14643 ,  H01L27/14687

摘要： A CMOS image sensor and a method for fabricating the same is disclosed, to decrease a darkcurrent generated in the boundary between a diffusion area of a photodiode and a device isolation layer, which includes a first conductive type semiconductor substrate having an active area and a device isolation area, the active area including a photodiode and a transistor; a device isolation layer formed in the device isolation area of the semiconductor substrate; a second conductive type diffusion area formed in the photodiode of the semiconductor substrate at a predetermined interval from the device isolation layer; a gate insulating layer and a gate electrode formed in the transistor of the semiconductor substrate; and a first conductive type first diffusion area formed in the semiconductor substrate of the boundary between the second conductive type diffusion area and the device isolation layer.

摘要翻译： 公开了一种CMOS图像传感器及其制造方法，以减少在光电二极管的扩散区域和器件隔离层之间的边界产生的暗电流，其包括具有有源区域的第一导电类型半导体衬底和器件隔离层 隔离区域，有源区域包括光电二极管和晶体管; 形成在所述半导体衬底的器件隔离区中的器件隔离层; 第二导电型扩散区域，形成在半导体衬底的光电二极管中，距离器件隔离层预定间隔; 栅极绝缘层和形成在所述半导体衬底的晶体管中的栅电极; 以及形成在第二导电型扩散区域和器件隔离层之间的边界的半导体衬底中的第一导电型第一扩散区域。

公开(公告)号：US07122476B2

公开(公告)日：2006-10-17

申请号：US10952161

申请日：2004-09-29

申请人： Chang Hun Han

发明人： Chang Hun Han

IPC分类号： H01L21/311

CPC分类号： H01L21/76229

摘要： In order to reduce the SAS resistance at the cell region with low process cost, a method for fabricating a semiconductor device according to the present invention includes forming a protection layer on a semiconductor substrate on which a cell region and a peripheral region are defined, forming a first trench and a second trench at the respective cell and the peripheral regions by selectively etching the protection layer and the semiconductor substrate, and deepening the second trench by further etching the peripheral region while the cell region being blocked and the peripheral region being exposed.

摘要翻译： 为了以较低的工艺成本降低单元区域的SAS电阻，根据本发明的半导体器件的制造方法包括在限定了单元区域和周边区域的半导体衬底上形成保护层，形成 通过选择性地蚀刻保护层和半导体衬底，在相应的单元和周边区域处的第一沟槽和第二沟槽，以及通过进一步蚀刻外围区域来加深第二沟槽，同时封闭单元区域和外围区域被暴露。

公开(公告)号：US06849886B1

公开(公告)日：2005-02-01

申请号：US10746615

申请日：2003-12-23

申请人： Chang Hun Han

发明人： Chang Hun Han

IPC分类号： H01L27/146 ,  H01L31/062

CPC分类号： H01L27/14689 ,  H01L27/1463

摘要： A CMOS image sensor and a method for manufacturing the same, capable of preventing an interface between an active region and a field region in the CMOS image sensor from being damaged by ion implantation. The method comprises the steps of depositing a sacrificial oxide layer and a hard mask layer on a semiconductor substrate; etching the sacrificial oxide layer and the hard mask layer to form a mask pattern; etching the substrate to a predetermined depth to form a trench; depositing an isolating material in the trench and planarizing it until substantially coplanar with the hard mask layer; removing the hard mask layer to leave a protrusion in the isolating layer; depositing an insulating layer on the substrate and isolating layer; and etching the insulating layer and the sacrificial oxide layer sufficiently to form a spacer mask and expose the surface of the substrate.

摘要翻译： CMOS图像传感器及其制造方法能够防止CMOS图像传感器中的有源区域和场区域之间的界面被离子注入损坏。 该方法包括以下步骤：在半导体衬底上沉积牺牲氧化物层和硬掩模层; 蚀刻牺牲氧化物层和硬掩模层以形成掩模图案; 将衬底蚀刻到预定深度以形成沟槽; 在沟槽中沉积隔离材料并将其平坦化直到与硬掩模层基本上共面; 去除硬掩模层以在隔离层中留下突起; 在衬底和隔离层上沉积绝缘层; 并且绝缘层和牺牲氧化物层充分蚀刻以形成间隔物掩模并暴露基板的表面。

公开(公告)号：US6071799A

公开(公告)日：2000-06-06

申请号：US105274

申请日：1998-06-26

申请人： Cheol Soo Park ,  Chi Sun Hwang ,  Chang Hun Han

发明人： Cheol Soo Park ,  Chi Sun Hwang ,  Chang Hun Han

IPC分类号： H01L21/28 ,  H01L21/60 ,  H01L21/768 ,  H01L21/8242 ,  H01L21/4763

CPC分类号： H01L21/76844 ,  H01L21/76802 ,  H01L21/76897 ,  H01L27/10894 ,  H01L27/10852

摘要： The present invention relates to a method of forming a contact of a semiconductor device, and more particularly, to a method of forming a contact of a semiconductor device that can improve the process yield of the device and reliability by simplifying the process of forming the contact hole of the top conductive layer without removing the etching barrier layer of the portion on which the contact hole of the top conductive layer is to be formed when a storage electrode contact is formed, where the contact hole of the top conductive layer is formed on the top of the bottom conductive layer, which refers to a process of forming the self-alignment contact.

摘要翻译： 本发明涉及一种形成半导体器件的接触的方法，更具体地说，涉及一种通过简化形成接触的工艺来形成半导体器件的接触的方法，该方法可以提高器件的工艺成品率和可靠性 在形成存储电极接触时不去除要形成顶部导电层的接触孔的部分的蚀刻阻挡层的顶部导电层的孔，其中顶部导电层的接触孔形成在 底部导电层的顶部，其指形成自对准接触的过程。