公开(公告)号：US20080165907A1

公开(公告)日：2008-07-10

申请号：US11621387

申请日：2007-01-09

申请人： Charles LeRoy SOBCHAK ,  Mahibur Rahman ,  Emilio J. Quiroga

发明人： Charles LeRoy SOBCHAK ,  Mahibur Rahman ,  Emilio J. Quiroga

IPC分类号： H04L7/00

CPC分类号： H04L7/0029 ,  H03H17/0628 ,  H03H17/0685

摘要： A multirate processing circuit (100) with a resampling filter (106) to accept a sampled input signal (104) sampled with a first clock rate and to filter the sampled input signal to remove spectral components above a spectral bandwidth of a second clock rate. The sampled input signal represents a signal that is more efficiently processed at the second clock rate, which is fractionally related to the first clock rate. The multirate processing circuit (100) also has a discrete time processor (108) that receives the resampling filter output (130) and processes that output at an integer power of two multiple of the first clock rate. The discrete time processor (108) further excludes selected samples from the processing so as to effectively perform discrete time processing of the resampling filter output (130) at the integer power of two multiple of the second clock rate.

摘要翻译： 一种具有重采样滤波器（106）的多速率处理电路（100），用于接受以第一时钟速率采样的采样输入信号（104），并且对采样的输入信号进行滤波以去除高于第二时钟速率的频谱带宽的频谱分量。 采样的输入信号表示以与第一时钟速率有关的第二时钟速率更有效地处理的信号。 多速率处理电路（100）还具有离散时间处理器（108），其接收重采样滤波器输出（130）并且处理以第一时钟速率的两倍的整数倍的输出。 离散时间处理器（108）还进一步从处理中排除所选择的采样，以便以第二时钟速率的两倍的整数倍有效地执行重采样滤波器输出（130）的离散时间处理。

公开(公告)号：US20080165899A1

公开(公告)日：2008-07-10

申请号：US11621355

申请日：2007-01-09

申请人： Mahibur Rahman ,  Charles LeRoy Sobchak

发明人： Mahibur Rahman ,  Charles LeRoy Sobchak

IPC分类号： H04L27/08 ,  H04B1/16

CPC分类号： H04B1/30 ,  H04L27/0002 ,  H04L27/22

摘要： A radio frequency receiver (102) includes at least one amplifier (108, 114 and 122) for amplifying a signal received by the radio frequency receiver, an automatic gain control system (158) for controlling a gain of the at least one amplifier, and a direct current offset correction filter (142) for reducing any direct current component of the signal amplified by the at least one amplifier. The direct current offset correction filter has a bandwidth that is dynamically controlled by a change in the gain of the at least one amplifier. The radio frequency receiver also includes a digital automatic gain control unit (150) having a bandwidth that is dynamically controlled by the change in the gain of the at least one amplifier.

摘要翻译： 射频接收器（102）包括用于放大由射频接收机接收的信号的至少一个放大器（108,114和122），用于控制至少一个放大器的增益的自动增益控制系统（158），以及 用于减少由至少一个放大器放大的信号的任何直流分量的直流偏移校正滤波器（142）。 直流偏移校正滤波器具有由至少一个放大器的增益的变化动态地控制的带宽。 无线电频率接收机还包括一个数字自动增益控制单元（150），该数字自动增益控制单元具有由至少一个放大器的增益变化动态控制的带宽。

公开(公告)号：US07369820B2

公开(公告)日：2008-05-06

申请号：US11096520

申请日：2005-04-01

申请人： Mahibur Rahman

发明人： Mahibur Rahman

IPC分类号： H04B1/04

CPC分类号： H04B1/0475

摘要： A radio frequency (RF) transceiver is provided. The RF transceiver comprises a transmit path comprising an output coupled to an RF antenna, a feedback path comprising an input coupled to the output of the transmit path, and a DC offset calibration module comprising a first input coupled to an output of the feedback path, a second input to receive a first signal and an output connected to an input of the transmit path. The DC offset calibration module is operable to determine a first direct current (DC) offset of a closed-loop path comprising the transmit path and the feedback path and determine a second DC offset based on the feedback path exclusive of the transmit path.

摘要翻译： 提供射频（RF）收发器。 RF收发器包括发射路径，其包括耦合到RF天线的输出，包括耦合到发射路径的输出的输入的反馈路径，以及包括耦合到反馈路径的输出的第一输入的DC偏移校准模块， 用于接收第一信号的第二输入和连接到所述发送路径的输入的输出。 DC偏移校准模块可操作以确定包括发射路径和反馈路径的闭环路径的第一直流（DC）偏移，并且基于排除发送路径的反馈路径来确定第二DC偏移。

公开(公告)号：US20070242599A1

公开(公告)日：2007-10-18

申请号：US11404350

申请日：2006-04-14

申请人： Robert Gorday ,  Mahibur Rahman

发明人： Robert Gorday ,  Mahibur Rahman

IPC分类号： H04J11/00

CPC分类号： H04L27/2647 ,  H04L25/0232 ,  H04L25/061 ,  H04L27/2657

摘要： A baseband receiver and corresponding methods are arranged and configured to mitigate effects of direct current (DC) distortion and process an Orthogonal Frequency Division Multiplexing (OFDM) signal as provided from a direct conversion radio or receiver. The baseband receiver includes an OFDM demodulator configured to demodulate the OFDM signal, a post processor coupled to the OFDM demodulator and configured to provide symbols corresponding to the OFDM signal, and a compensator coupled to at least one of the OFDM demodulator and the post processor and configured to reduce error rates out of the baseband receiver that result from DC distortion in the direct conversion radio.

摘要翻译： 基带接收机和相应的方法被布置和配置为减轻直流（DC）失真的影响并处理从直接转换无线电或接收机提供的正交频分复用（OFDM）信号。 基带接收机包括被配置为解调OFDM信号的OFDM解调器，耦合到OFDM解调器并被配置为提供对应于OFDM信号的符号的后处理器，以及耦合到OFDM解调器和后处理器中的至少一个的补偿器， 被配置为从直接转换无线电中的DC失真导致的基带接收机之外的差错率降低。

公开(公告)号：US07272178B2

公开(公告)日：2007-09-18

申请号：US10730387

申请日：2003-12-08

申请人： Mahibur Rahman ,  Homero Luz Guimaraes

发明人： Mahibur Rahman ,  Homero Luz Guimaraes

IPC分类号： H04B1/66 ,  H04B1/00

CPC分类号： H03H11/1291

摘要： An analog filter (10) having a bandwidth tracking circuit includes an analog filter element (14) and a digital tracking loop (22). The digital tracking loop (22) compares a magnitude difference to a predetermined threshold to generate an error signal. The magnitude difference is determined during a closed loop bandwidth calibration by subtracting a first magnitude of an analog input signal over a predetermined frequency range to a second magnitude of the analog input signal over the predetermined frequency range located near the bandwidth frequency. Use of the digital tracking loop (22) provides a digital approach for achieving bandwidth tracking of an analog filter without the need for achieving any manufacturing process matching between the analog filter and the tracking circuit itself. The analog filter element (14) may be either a lowpass, highpass, bandpass, active or passive filter element.

摘要翻译： 具有带宽跟踪电路的模拟滤波器（10）包括模拟滤波器元件（14）和数字跟踪环路（22）。 数字跟踪环路（22）将幅度差与预定阈值进行比较以产生误差信号。 在闭环带宽校准期间，通过在预定频率范围内减去模拟输入信号的第一幅度到位于带宽频率附近的预定频率范围的模拟输入信号的第二幅度来确定幅度差。 数字跟踪回路（22）的使用提供了一种用于实现模拟滤波器的带宽跟踪的数字方式，而不需要实现模拟滤波器和跟踪电路本身之间的任何制造过程匹配。 模拟滤波器元件（14）可以是低通，高通，带通，有源或无源滤波器元件。

公开(公告)号：US20070057737A1

公开(公告)日：2007-03-15

申请号：US11226081

申请日：2005-09-14

申请人： Darrell Davis ,  Mahibur Rahman

发明人： Darrell Davis ,  Mahibur Rahman

IPC分类号： H03L7/00

CPC分类号： H03C3/0925 ,  H03C3/0933

摘要： A modulation distortion compensation system for a phase locked loop 109 includes a compensation function (115) that is arranged to be coupled to a tuning voltage signal (117) corresponding to a tuning voltage from the phase locked loop and is configured to select a filter response from a plurality of filter responses, where the filter response corresponds to the tuning voltage. The distortion compensation system further includes a filter 224 that is configured to distort a modulation signal in accordance with the filter response and provide a distorted signal suitable for being coupled to a modulation input 211 of a feedback divider 209 included with the phase locked loop, wherein the distorted signal when used by the feedback divider will facilitate modulation and compensation of a radio frequency signal provided by the phase locked loop. Various environmental measurements in addition to the tuning voltage can also be used in selecting the filter response.

摘要翻译： 用于锁相环109的调制失真补偿系统包括补偿功能（115），其被布置为耦合到对应于来自锁相环的调谐电压的调谐电压信号（117），并且被配置为选择滤波器响应 来自多个滤波器响应，其中滤波器响应对应于调谐电压。 失真补偿系统还包括滤波器224，滤波器224被配置为根据滤波器响应使调制信号失真，并提供适于耦合到锁相环包含的反馈分频器209的调制输入211的失真信号，其中 由反馈分频器使用时的失真信号将有助于调制和补偿由锁相环提供的射频信号。 除了调谐电压之外，还可以使用各种环境测量来选择滤波器响应。

公开(公告)号：US20060222117A1

公开(公告)日：2006-10-05

申请号：US11099138

申请日：2005-04-04

申请人： Mahibur Rahman ,  Manish Shah ,  Charles Sobchak

发明人： Mahibur Rahman ,  Manish Shah ,  Charles Sobchak

IPC分类号： H04L27/08 ,  H03D1/04

CPC分类号： H04L25/061 ,  H03D3/008 ,  H03G3/3068 ,  H04B1/30

摘要： A method and apparatus are provided for providing improved radio frequency (RF) receiver signal correction. For RF receiver circuitry (106) having receive path and a warmup period associated therewith and including at least one analog baseband gain control stage (218) having a gain associated therewith, the method includes the step of performing a DC correction calculation operation during the warmup period to derive a DC correction value having a first component and a second component for each of the at least one gain control stage (218). The DC correction calculation step includes the steps of performing a first closed loop correction (460) of a baseband path to derive the first component of the DC correction value and performing a second closed loop correction (462) of the receive path as a function of the (218) gain during the warmup period to derive the second component of the DC correction value. During operation after the warmup period (464, 466), an open loop correction is performed for instantaneous DC correction as function of the PMA (218) gain and the DC correction value.

摘要翻译： 提供了一种用于提供改进的射频（RF）接收机信号校正的方法和装置。 对于具有接收路径和与其相关联的预热时段的RF接收器电路（106），并且包括具有与其相关联的增益的至少一个模拟基带增益控制级（218），该方法包括在预热期间执行DC校正计算操作的步骤 以产生具有用于所述至少一个增益控制级（218）中的每一个的第一分量和第二分量的DC校正值。 DC校正计算步骤包括以下步骤：执行基带路径的第一闭环校正（460）以导出DC校正值的第一分量，并且执行作为接收路径的函数的接收路径的第二闭环校正（462） （218）在预热期间获得增益，以导出DC校正值的第二分量。 在预热时段（464,466）之后的操作期间，作为PMA（218）增益和DC校正值的函数，执行用于瞬时DC校正的开环校正。

公开(公告)号：US20050191975A1

公开(公告)日：2005-09-01

申请号：US10790516

申请日：2004-03-01

申请人： Sumit Talwalkar ,  Mahibur Rahman ,  Steven Hoggarth

发明人： Sumit Talwalkar ,  Mahibur Rahman ,  Steven Hoggarth

IPC分类号： H03C1/62 ,  H04B1/04 ,  H04B7/005 ,  H04B17/00

CPC分类号： H04W52/52 ,  H04B2001/0416

摘要： A method and system controls transmit power by combining the advantages of digital attenuation and analog baseband step attenuators by calibration to overcome the limitations of analog step attenuators. The calibration technique uses highly accurate digital attenuators to determine the actual sizes of the analog steps as analog step attenuator is stepped through a range of attenuation levels. A method of calibration accurately measures attenuation steps comparison to a digital attenuator so that the attenuation actually realized by the analog step attenuator is accurately known. Therefore, the difference between the attenuation realized by the analog step attenuator and the desired attenuation is accurately known. The difference is realized in the digital attenuator and the attenuation resulting from the composite of the digital and analog step attenuator can very accurately realize the requested attenuation.

摘要翻译： 一种方法和系统通过校准数字衰减和模拟基带阶跃衰减器的优点来控制发射功率，以克服模拟步进衰减器的局限性。 校准技术使用高精度的数字衰减器来确定模拟步进的实际尺寸，因为模拟步进衰减器通过一定范围的衰减水平。 校准方法精确地测量与数字衰减器的衰减步骤比较，使得由模拟步进衰减器实际实现的衰减被准确地知道。 因此，模拟步进衰减器实现的衰减与所需的衰减之间的差异是准确的。 在数字衰减器中实现了差异，并且由数字和模拟步进衰减器的复合产生的衰减可以非常准确地实现所要求的衰减。

公开(公告)号：US20050018788A1

公开(公告)日：2005-01-27

申请号：US10625957

申请日：2003-07-24

申请人： Sumit Talwalkar ,  Mahibur Rahman

发明人： Sumit Talwalkar ,  Mahibur Rahman

IPC分类号： H03C3/40 ,  H03D3/00 ,  H04L27/20 ,  H04L27/12 ,  H03C3/00 ,  H04L27/04

CPC分类号： H04L27/206 ,  H03C3/40 ,  H03D3/008

摘要： A method includes performing a search method to determine a pair of receiver path correction signals, performing the search method to determine a pair of transmitter path correction signals, and using the pairs of receiver path and transmitter path correction signals to suppress a carrier signal. An apparatus includes a first pair of summers, an upconverter circuit coupled to the first pair of summers, a multiplexer coupled to the upconverter circuit, to a ground, and to an RF front end, a downconverter circuit coupled to the multiplexer, a second pair of summers coupled to the downconverter circuit, and a correction circuit coupled to the first and second pairs of summers.

摘要翻译： 一种方法包括执行搜索方法来确定一对接收机路径校正信号，执行搜索方法以确定一对发射机路径校正信号，以及使用接收机路径对和发射机路径校正信号来抑制载波信号。 一种装置包括第一对加法器，耦合到第一对加法器的上变频器电路，耦合到上变频器电路的地多路复用器，耦合到RF前端，耦合到多路复用器的下变频器电路，第二对 耦合到下变频器电路的夏季以及耦合到第一和第二对夏波的校正电路。

公开(公告)号：US06487260B1

公开(公告)日：2002-11-26

申请号：US09285977

申请日：1999-04-05

申请人： Robert K. Schweickert ,  Mahibur Rahman ,  Christopher T. Thomas ,  Clinton C Powell, II

发明人： Robert K. Schweickert ,  Mahibur Rahman ,  Christopher T. Thomas ,  Clinton C Powell, II

IPC分类号： H04L2706

CPC分类号： H04L27/148

摘要： A full serial implementation of a M-level correlation based demodulator (100) includes a two's complement, pass-through, zero-out complex conjugate multiplier element (102), a boxcar filter (104) coupled to the multiplier element, a complex magnitude approximater element (106) coupled to the boxcar filter and a maximum value and index holding element (108). The multiplier element reuses common products along an M-level of cross-correlation to reduce multiplication functions at a rate 2 times M faster than a sampling rate at an input of the demodulator.

摘要翻译： 基于M电平相关的解调器（100）的完整串行实现包括二进制补码，直通，零输出复共轭乘数元素（102），耦合到乘法器元件的箱式滤波器（104），复数量级 耦合到箱式过滤器的近似元件（106）和最大值和指标保持元件（108）。 乘法器元件沿着互相关的M级重复使用公共产品，以比解调器的输入端的采样速率快2倍的速率来减少乘法函数。