公开(公告)号：US20050271870A1

公开(公告)日：2005-12-08

申请号：US10982324

申请日：2004-11-05

申请人： Warren Jackson

发明人： Warren Jackson

IPC分类号： B32B27/04 ,  B32B27/08 ,  B32B27/12

CPC分类号： G03F7/0002 ,  B32B27/12 ,  B44C1/227 ,  B82Y10/00 ,  B82Y40/00 ,  C09J7/00 ,  C09J2201/626 ,  D04H1/4382 ,  D04H1/4391 ,  D04H1/58 ,  D04H11/00 ,  Y10T428/249941 ,  Y10T442/20 ,  Y10T442/2738

摘要： Embodiments of the present invention include hierarchically-dimensioned, microfiber-based dry adhesive materials featuring dense arrays of microfibers with free tips terminating in numerous microfibrils. In certain embodiments, more than two levels of microfiber-dimension hierarchy may be employed, each dimension involving smaller microfibrils emanating from the tips of the microfibers or microfibrils of the next highest dimensional level. Various additional embodiments of the present invention are directed to methods for preparing hierarchically-dimensioned, microfiber-based dry adhesive materials. These methods include single-pass or multi-pass imprint-lithography, pattern masking and etching, and imprinting fiber-embedded substrates followed by etching.

摘要翻译： 本发明的实施方案包括具有密集阵列的微纤维的分层尺寸的基于超细纤维的干燥粘合剂材料，其具有终止于许多微原纤维的自由末端。 在某些实施方案中，可以采用多于两个级别的微纤维维度层级，每个维度涉及从下一个最高维度水平的微纤维或微纤丝的尖端发出的较小的微纤丝。 本发明的各种另外的实施方案涉及制备分层尺寸的基于超细纤维的干燥粘合剂材料的方法。 这些方法包括单遍或多遍压印光刻，图案掩蔽和蚀刻，以及刻蚀光纤嵌入基板，随后蚀刻。

公开(公告)号：US20050261881A1

公开(公告)日：2005-11-24

申请号：US10851485

申请日：2004-05-21

申请人： Warren Jackson

发明人： Warren Jackson

IPC分类号： G06F17/50

CPC分类号： G06F17/50 ,  G06F2217/04 ,  G06K9/4671

摘要： A proposed feature vector for a first deign is received and an existing feature vector for an existing design is retrieved for a given task. The proposed design is evaluated against the existing design using task-based scores associated with each design and based on their performances for the given task.

摘要翻译： 接收用于第一设计的所提出的特征向量，并且为给定任务检索现有设计的现有特征向量。 所提出的设计是根据现有设计进行评估，使用与每个设计相关联的基于任务的分数，并根据其对给定任务的性能进行评估。

公开(公告)号：US20050237845A1

公开(公告)日：2005-10-27

申请号：US11171694

申请日：2005-06-30

申请人： Frederick Perner ,  Andrew Van Brocklin ,  Warren Jackson

发明人： Frederick Perner ,  Andrew Van Brocklin ,  Warren Jackson

IPC分类号： G11C11/15 ,  G11C8/00 ,  G11C8/08 ,  G11C11/14 ,  G11C11/16 ,  G11C17/00 ,  H01L27/22 ,  H01L27/24

CPC分类号： G11C11/16 ,  G11C8/08 ,  G11C13/0028 ,  G11C13/003 ,  G11C2213/72 ,  G11C2213/78 ,  H01L27/224 ,  H01L27/24

摘要： A resistive cross point memory cell array comprising a plurality of word lines, a plurality of bit lines, a plurality of cross points formed by the word lines and the bit lines, and a plurality of memory cells, each of the memory cells being located at a different one of the cross points, wherein a first bit line comprises a distributed series diode along an entire length of the bit line such that each of the associated memory cells located along the first bit line is coupled between the distributed series diode and an associated word line.

摘要翻译： 一种电阻交叉点存储单元阵列，包括多个字线，多个位线，由字线和位线形成的多个交叉点，以及多个存储单元，每个存储器单元位于 交叉点中的不同的一个，其中第一位线包括沿着位线的整个长度的分布式串联二极管，使得沿着第一位线定位的每个相关联的存储器单元耦合在分布式串联二极管和相关联的 字线。

公开(公告)号：US20050167787A1

公开(公告)日：2005-08-04

申请号：US10772945

申请日：2004-02-04

申请人： Peter Fricke ,  Andrew Van Brocklin ,  Warren Jackson

发明人： Peter Fricke ,  Andrew Van Brocklin ,  Warren Jackson

IPC分类号： H01L27/10 ,  H01L23/58

CPC分类号： H01L27/101

摘要： A memory array has a multiplicity of row conductors and a multiplicity of column conductors, the row conductors and column conductors being arranged to cross at cross-points, and has a memory cell disposed at each cross-point, each memory cell having a storage element and a control element coupled in series between a row conductor and a column conductor, and each control element including a silicon-rich insulator. Methods for fabricating the memory array are disclosed.

摘要翻译： 存储器阵列具有多个行导体和多个列导体，行导体和列导体布置成在交叉点处交叉，并且具有设置在每个交叉点处的存储单元，每个存储单元具有存储元件 以及串联耦合在行导体和列导体之间的控制元件，并且每个控制元件包括富硅绝缘体。 公开了制造存储器阵列的方法。

公开(公告)号：US20050087578A1

公开(公告)日：2005-04-28

申请号：US10692973

申请日：2003-10-23

申请人： Warren Jackson

发明人： Warren Jackson

IPC分类号： H01L21/027 ,  D06H3/12 ,  G01N21/89 ,  G01N21/898 ,  G03F7/20 ,  G03F9/00 ,  H01L21/00 ,  B65H23/032

CPC分类号： G03F7/7035 ,  D06H3/12 ,  D06H3/125 ,  G01N21/8903 ,  G01N21/898 ,  G03F7/70791 ,  G03F9/7003 ,  H01L21/67288

摘要： The present invention includes a method and system for correcting web deformation during a roll-to-roll process. The present invention includes controllable mechanical components that are capable of dynamically adjusting the planarity of the web during the roll-to-roll process. By adjusting the web during the roll-to-roll process, the accuracy of the layer-to layer alignment of successive patterning steps is greatly increased thereby enabling the production of electronic structures with lower overlap capacitance and higher resolution. A first aspect of the present invention is a method for correcting web deformation during a roll-to-roll process. The method includes initiating a roll-to-roll process involving a flexible web substrate, detecting deformation in the flexible web substrate during the roll-to-roll process and dynamically aligning the flexible web substrate based on the detected deformation.

摘要翻译： 本发明包括一种用于在卷对卷过程中校正卷材变形的方法和系统。 本发明包括可控制的机械部件，其能够在卷对卷过程中动态地调整卷材的平面度。 通过在卷对卷过程中调整幅材，连续图案化步骤的层间对准的精度大大提高，从而能够生产具有较低重叠电容和较高分辨率的电子结构。 本发明的第一方面是一种在卷对卷过程中校正卷材变形的方法。 该方法包括启动涉及柔性幅材基材的卷对卷过程，检测在卷对卷过程中的柔性幅材基材中的变形并基于检测到的变形来动态地对准柔性幅材基板。