Imaging cell that has a long integration period and method of operating the imaging cell
    61.
    发明申请
    Imaging cell that has a long integration period and method of operating the imaging cell 有权
    成像细胞具有长的积分期和操作成像细胞的方法

    公开(公告)号:US20060027845A1

    公开(公告)日:2006-02-09

    申请号:US11242094

    申请日:2005-10-03

    IPC分类号: H01L31/113

    摘要: The integration period of an imaging cell, or the time that an imaging cell is exposed to light energy, is substantially increased by utilizing a single-poly, electrically-programmable, read-only-memory (EPROM) structure to capture the light energy. Photogenerated electrons are formed in the channel region of the EPROM structure from the light energy. The photogenerated electrons are then accelerated into having ionizing collisions which, in turn, leads to electrons being injected onto the floating gate of the EPROM structure at a rate that is proportionate to the number of photons captured by the channel region.

    摘要翻译: 成像单元的积分周期或成像单元暴露于光能的时间通过利用单聚电子可编程只读存储器(EPROM)结构捕获光能而大大增加。 光能从EPROM结构的沟道区形成光电子。 光生成的电子然后被加速成具有电离碰撞,其进而导致电子以与通道区域捕获的光子数成正比的速率注入到EPROM结构的浮动栅极上。

    Wedge-shaped high density capacitor and method of making the capacitor
    62.
    发明授权
    Wedge-shaped high density capacitor and method of making the capacitor 有权
    楔形高密度电容器和制造电容器的方法

    公开(公告)号:US06639784B1

    公开(公告)日:2003-10-28

    申请号:US10283810

    申请日:2002-10-30

    IPC分类号: H01J4228

    CPC分类号: H01L28/91 H01L27/0805

    摘要: A capacitor structure is formed in a wedge-shaped trench by forming alternating layers of insulating material and conductive material in the trench such that each layer of conductive material formed in the trench is electrically isolated from adjacent layers of conductive material formed in the trench. A first electrical contact is formed to electrically link in parallel a first set of alternating layers of conductive material. A second electrical contact is formed to electrically link in parallel a second set of alternating layers of conductive material. The two electrically isolated sets of inter-linked layers of conductive material define the interdigitated capacitor structure.

    摘要翻译: 电容器结构通过在沟槽中形成绝缘材料和导电材料的交替层而形成在楔形沟槽中,使得形成在沟槽中的每个导电材料层与在沟槽中形成的导电材料的相邻层电隔离。 形成第一电接触以平行地电连接导电材料的第一组交替层。 形成第二电接触以平行地电连接第二组交替的导电材料层。 导电材料的两个电隔离的相互连接的层限定了交叉指向的电容器结构。

    Fabrication of semiconductor structure having N-channel channel-junction field-effect transistor
    64.
    发明授权
    Fabrication of semiconductor structure having N-channel channel-junction field-effect transistor 有权
    具有N沟道沟道结场效应晶体管的半导体结构的制造

    公开(公告)号:US07595243B1

    公开(公告)日:2009-09-29

    申请号:US11495225

    申请日:2006-07-28

    IPC分类号: H01L21/8236

    摘要: A semiconductor technology combines a normally off n-channel channel-junction insulated-gate field-effect transistor (“IGFET”) (104) and an n-channel surface-channel IGFET (100 or 160) to reduce low-frequency 1/f noise. The channel-junction IGFET is normally fabricated to be of materially greater gate dielectric thickness than the surface-channel IGFET so as to operate across a greater voltage range than the surface-channel IGFET. A p-channel surface-channel IGFET (102 or 162), which is typically fabricated to be of approximately the same gate-dielectric thickness as the n-channel surface-channel IGFET, is preferably combined with the two n-channel IGFETs to produce a complementary-IGFET structure. A further p-channel IGFET (106, 180, 184, or 192), which is typically fabricated to be of approximately the same gate dielectric thickness as the n-channel channel-junction IGFET, is also preferably included. The further p-channel IGFET can be a surface-channel or channel-junction device.

    摘要翻译: 半导体技术结合了正常n沟道沟道结绝缘栅场效应晶体管(“IGFET”)(104)和n沟道表面沟道IGFET(100或160),以降低低频1 / f 噪声。 沟道结IGFET通常被制造为具有比表面沟道IGFET大得多的栅介质厚度,以便在比表面沟道IGFET更大的电压范围内工作。 典型地制造为与n沟道表面沟道IGFET大致相同的栅介质厚度的p沟道表面沟道IGFET(102或162)优选地与两个n沟道IGFET组合以产生 互补IGFET结构。 还优选包括通常被制造为具有与n沟道沟道结IGFET大致相同的栅介质厚度的另外的p沟道IGFET(106,180,184或192)。 另外的p沟道IGFET可以是表面沟道或沟道结器件。

    Active pixel sensor cell with integrating varactor and method for using such cell

    公开(公告)号:US20060266925A1

    公开(公告)日:2006-11-30

    申请号:US11496951

    申请日:2006-08-01

    IPC分类号: H01L27/00

    摘要: An active pixel sensor cell including at least one photodiode and reset circuitry and an integrating varactor coupled to the photodiode, a method for reading out such a cell, and an image sensor including an array of such cells. The photodiode can be exposed to photons during an exposure interval to accumulate a sequence of subexposure charges at a first node of the photodiode. Each of the subexposure charges accumulates at the first node during a different subexposure interval of the exposure interval. The photodiode is reset during each of a sequence of reset intervals, each reset interval occurring before a different one of the subexposure intervals. An output signal indicative of an exposure charge accumulated at the storage node during the exposure interval can be asserted from the cell, where the exposure charge is indicative of a sum of all the subexposure charges.

    Apparatus for high sensitivity, low lag, high voltage swing in a pixel cell with an electronic shutter
    66.
    发明授权
    Apparatus for high sensitivity, low lag, high voltage swing in a pixel cell with an electronic shutter 有权
    用于具有电子快门的像素单元中的高灵敏度,低滞后,高电压摆幅的装置

    公开(公告)号:US06720592B1

    公开(公告)日:2004-04-13

    申请号:US09895803

    申请日:2001-06-29

    IPC分类号: H01L27148

    CPC分类号: H01L27/14601

    摘要: The present invention is directed to a photogate based pixel cell with an electronic shutter and which provides relatively low lag and high sensitivity for sensing infrared light reflected from objects. Additionally, this invention eliminates the need for a transfer gate in the pixel cell. In one embodiment, the reset and shutter transistors are implemented with PMOS transistors so that the pixel cell can have an increased dynamic range and a relatively high voltage swing. In another embodiment, the actual size of each pixel cell can be further reduced when the reset gate and the electronic shutter are implemented with NMOS transistors. Also, when a P− well is not disposed beneath the photogate, the ability of the pixel cell to sense infrared light is improved. Correlated double sampling can be used to improve the accuracy of the signal read out from the pixel cell.

    摘要翻译: 本发明涉及一种具有电子快门的基于光栅的像素单元,其提供用于感测从物体反射的红外光的相对较低的滞后和高灵敏度。 另外,本发明消除了对像素单元中的传输门的需要。 在一个实施例中,复位和快门晶体管由PMOS晶体管实现,使得像素单元可以具有增加的动态范围和相对高的电压摆幅。 在另一个实施例中,当复位门和电子快门用NMOS晶体管实现时,可以进一步减小每个像素单元的实际尺寸。 此外,当P-阱不设置在光栅下方时,像素单元感测红外光的能力得到改善。 可以使用相关的双重采样来提高从像素单元读出的信号的精度。

    Vertical photodetector with improved photocarrier separation and low capacitance
    67.
    发明授权
    Vertical photodetector with improved photocarrier separation and low capacitance 有权
    具有改进的光载流子分离和低电容的垂直光电探测器

    公开(公告)号:US06534759B1

    公开(公告)日:2003-03-18

    申请号:US09950121

    申请日:2001-09-10

    IPC分类号: H01L3100

    摘要: A vertical photodetector for detecting different wavelengths of light. The structure provides doped regions, which are separated by barrier regions. The doped regions detect photons corresponding to different wavelengths of light. Specifically, by detecting the amount of electrical charge collected by diodes positioned in the different doped regions, different wavelengths of light can be detected. The barrier regions inhibit the flow of electrical charges from one doped region into another doped region. The area of the doped regions can be increased, without increasing the capacitance of the diodes which are used to detect the electrical charges generated by light incident of the vertical photodetector.

    摘要翻译: 用于检测不同波长的光的垂直光电探测器。 该结构提供掺杂区域,其被屏障区域分隔开。 掺杂区域检测对应于不同波长的光的光子。 具体地,通过检测位于不同掺杂区域中的二极管收集的电荷量,可以检测不同波长的光。 阻挡区域阻止电荷从一个掺杂区域流入另一个掺杂区域。 可以增加掺杂区域的面积,而不增加用于检测由垂直光电检测器入射的光产生的电荷的二极管的电容。

    Configuration and fabrication of semiconductor structure having n-channel channel-junction field-effect transistor
    68.
    发明授权
    Configuration and fabrication of semiconductor structure having n-channel channel-junction field-effect transistor 有权
    具有n沟道沟道结场效应晶体管的半导体结构

    公开(公告)号:US07176530B1

    公开(公告)日:2007-02-13

    申请号:US10803203

    申请日:2004-03-17

    IPC分类号: H01L29/76

    摘要: A semiconductor technology combines a normally off n-channel channel-junction insulated-gate field-effect transistor (“IGFET”) (104) and an n-channel surface-channel IGFET (100 or 160) to reduce low-frequency 1/f noise. The channel-junction IGFET is normally of materially greater gate dielectric thickness than the surface-channel IGFET so as to operate across a greater voltage range than the surface-channel IGFET. Alternatively or additionally, the channel-junction IGFET may conduct current through a field-induced surface channel. A p-channel surface-channel IGFET (102 or 162), which is typically of approximately the same gate-dielectric thickness as the n-channel surface-channel IGFET, is preferably combined with the two n-channel IGFETs to produce a complementary-IGFET structure. A further p-channel IGFET (106, 180, 184, or 192), which is typically of approximately the same gate dielectric thickness as the n-channel channel-junction IGFET, is also preferably included. The further p-channel IGFET can be a surface-channel or channel-junction device.

    摘要翻译: 半导体技术结合了正常n沟道沟道结绝缘栅场效应晶体管(“IGFET”)(104)和n沟道表面沟道IGFET(100或160),以降低低频1 / f 噪声。 沟道结IGFET通常具有比表面沟道IGFET大得多的栅介质厚度,以便在比表面沟道IGFET更大的电压范围内工作。 或者或另外,通道结IGFET可以传导电流通过场诱导的表面通道。 通常与n沟道表面沟道IGFET大致相同的栅介质厚度的p沟道表面沟道IGFET(102或162)优选与两个n沟道IGFET组合, IGFET结构。 还优选包括通常具有与n沟道沟道结IGFET大致相同的栅介质厚度的另外的p沟道IGFET(106,180,184或192)。 另外的p沟道IGFET可以是表面沟道或沟道结器件。