公开(公告)号：US11341913B2

公开(公告)日：2022-05-24

申请号：US17227579

申请日：2021-04-12

Applicant: Samsung Display Co., Ltd.

Inventor： Hyo Jin Lee ,  Joon-Chul Goh ,  Sangan Kwon ,  Hui Nam ,  Jin Young Roh ,  Sehyuk Park

IPC: G09G3/3233 ,  G09G3/325 ,  G09G3/3275

Abstract: A pixel circuit includes a main-circuit that controls an organic light-emitting element by controlling a driving current to flow into the organic light-emitting element and a sub-circuit including a first compensation transistor including a gate terminal which receives a first gate signal, a second compensation transistor including a gate terminal which receives a second gate signal, and an initialization transistor including a gate terminal which receives an initialization signal. Here, in a low-frequency driving mode, a driving frequency of the first gate signal is N hertz (Hz), a driving frequency of the initialization signal is N Hz, a driving frequency of the second gate signal is M Hz, the first compensation transistor and the initialization transistor are turned on during a first time duration in N non-light-emitting periods per second, and the second compensation transistor is turned on during a second time duration in M non-light-emitting periods per second.

公开(公告)号：US11200853B2

公开(公告)日：2021-12-14

申请号：US17232061

申请日：2021-04-15

Applicant: Samsung Display Co., Ltd. ,  Korea University Research and Business Foundation

Inventor： Young-Soo Hwang ,  Joon-Chul Goh ,  Oh Jo Kwon ,  Ki-Duk Kim ,  Jeongmin Kim ,  Bong Hyun You ,  Hyung-Min Lee ,  Seung Hun Choi

IPC: G09G3/3233 ,  G09G3/3275

Abstract: A data driver includes a gamma voltage generator configured to generate gamma voltages based on a number of data bits of a pixel data; a first digital-to-analog block configured to generate a plurality of time-division gamma voltage signals respectively corresponding to a plurality of gamma voltage groups; a plurality of time-division gamma voltage line groups for transferring the plurality of time-division gamma voltage signals; a second digital-to-analog block configured to select a time-division gamma voltage signal among the time-division gamma voltage signals according to upper bits of the pixel data in each channel; a time-division gamma voltage select block configured to select a gamma voltage according to lower bits of the pixel data in each channel; and an output buffer block configured to output the selected gamma voltage in each channel.

公开(公告)号：US20190279551A1

公开(公告)日：2019-09-12

申请号：US16420400

申请日：2019-05-23

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： MUN-SAN PARK ,  Joon-Chul Goh ,  Woo-Mi Bae ,  Kyoung-Won Lee

IPC: G09G3/20

Abstract: A display apparatus includes a display panel and a timing controller The timing controller generates first output image data based on input image data and sets a driving frequency of the display panel as a first frequency in a first operation mode. The timing controller converts the input image data into second output image data and sets the driving frequency of the display panel as a second frequency lower than the first frequency in a second operation mode. The display panel displays a first image based on the first frequency and the first output image data in the first operation mode. The first image is represented by X grayscales. The display panel displays a second image based on the second frequency and the second output image data in the second operation mode. The second image is represented by Y grayscales, where Y is less than X.

公开(公告)号：US10339848B2

公开(公告)日：2019-07-02

申请号：US14993494

申请日：2016-01-12

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Mun-San Park ,  Joon-Chul Goh ,  Woo-Mi Bae ,  Kyoung-Won Lee

IPC: G09G5/10 ,  G09G3/20

Abstract: A display apparatus includes a display panel and a timing controller. The timing controller generates first output image data based on input image data and sets a driving frequency of the display panel as a first frequency in a first operation mode. The timing controller converts the input image data into second output image data and sets the driving frequency of the display panel as a second frequency lower than the first frequency in a second operation mode. The display panel displays a first image based on the first frequency and the first output image data in the first operation mode. The first image is represented by X grayscales. The display panel displays a second image based on the second frequency and the second output image data in the second operation mode. The second image is represented by Y grayscales, where Y is less than X.

公开(公告)号：US10068537B2

公开(公告)日：2018-09-04

申请号：US14579412

申请日：2014-12-22

Applicant: Samsung Display Co., Ltd.

Inventor： Dong-Gyu Lee ,  Joon-Chul Goh ,  Jung-Won Kim ,  Nam-Gon Choi ,  Ja-Kyoung Jin

IPC: G09G5/10 ,  G09G3/36

Abstract: An image processor, a display device including the same, and a method for driving display panel using the same are disclosed. In one aspect, the display device includes an image shifter configured to shift a data signal by at least one pixel based at least in part on a shift start signal and output the shifted data signal and a shift direction signal. The display device also includes an image buffer configured to output current data and previous data based at least in part on the shifted data signal and the shift direction signal. The display device also includes an image mixer configured to mix the current data and the previous data over M frames starting at a start frame when the shift start signal is received and output image data, M being a natural number.

公开(公告)号：US10062347B2

公开(公告)日：2018-08-28

申请号：US14735388

申请日：2015-06-10

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jung-Taek Kim ,  Joon-Chul Goh ,  Sang-Ik Lee ,  Kyoung-Ho Lim

IPC: G09G3/36

CPC classification number: G09G3/3677 ,  G09G3/3666 ,  G09G2300/0426 ,  G09G2310/021 ,  G09G2310/0264 ,  G09G2310/08 ,  G09G2320/02

Abstract: A display apparatus includes a display panel and a first gate driver. The display panel includes a plurality of data lines extending in a first direction, and a plurality of gate lines extending in a second direction obliquely inclined toward the first direction and spaced apart from each other in a third direction crossing the second direction. The plurality of gate lines includes a first gate line group and a second gate line group respectively disposed in first and second display areas of the display panel. The first gate driver is configured to drive at least one gate line of the second gate line group while driving at least one gate line of the first gate line group.

公开(公告)号：US09898980B2

公开(公告)日：2018-02-20

申请号：US14702611

申请日：2015-05-01

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Ho-Kyoon Kwon ,  Myoung-Soo Kim ,  Sang-Ik Lee ,  Kyoung-Ho Lim ,  Kwang-Chul Jung ,  Jun-Ki Jeong ,  Ki-Seok Cha ,  Joon-Chul Goh ,  Bong-Hyun You

IPC: G09G3/36

CPC classification number: G09G3/3648 ,  G09G3/3614 ,  G09G2300/0426 ,  G09G2310/0281

Abstract: A display apparatus includes a plurality of pixels arranged in columns and rows in a display area, a data line extending in a first direction and connected with pixels of a k-th column (‘k’ is a natural number) and a (k+1)-th column, a gate line extending in a second direction crossing the first direction and connected with ones of the pixels, a gate signal line extending in the first direction and connected with the gate line, and a gate driver in a first peripheral area adjacent to a first longer side of the display area and having a first width, and configured to apply a gate signal to the gate line.

公开(公告)号：US09818364B2

公开(公告)日：2017-11-14

申请号：US14690711

申请日：2015-04-20

Applicant: Samsung Display Co., LTD.

Inventor： Kyoung-Won Lee ,  Su-Hyeong Park ,  Mun-San Park ,  Joon-Chul Goh ,  Woo-Mi Bae

IPC: G09G3/36

CPC classification number: G09G3/3688 ,  G09G3/3614 ,  G09G3/3648 ,  G09G3/3696 ,  G09G2310/0248 ,  G09G2310/027 ,  G09G2310/0297 ,  G09G2310/08 ,  G09G2320/0276 ,  G09G2330/021 ,  G09G2340/0435 ,  G09G2340/16

Abstract: A display apparatus includes a timing controller, a data driver and a display panel. The timing controller receives input image data at a first frequency substantially equal to a frame rate of an input image. The timing controller generates a data signal having the first frequency based on the input image data having the first frequency. The data driver converts the data signal into a data voltage. The display panel displays an image based on the data voltage.

公开(公告)号：US09709439B2

公开(公告)日：2017-07-18

申请号：US14286286

申请日：2014-05-23

Applicant: Samsung Display Co., LTD.

Inventor： Joon-Chul Goh ,  Jae-Keun Lim

IPC: G06F3/038 ,  G01J1/46 ,  G06F3/041 ,  H01L27/32 ,  G01J1/44

CPC classification number: G01J1/46 ,  G01J2001/444 ,  G01J2001/4473 ,  G06F3/0412 ,  H01L27/3227 ,  H01L27/3234

Abstract: A light sensitive circuit includes a light sensing capacitor and a driving transistor. The light sensing capacitor is configured to sense light of a predetermined one or more wavelengths. The driving transistor includes a gate electrode electrically connected to the light sensing capacitor and is configured to generate a light sensing current according to a voltage of the gate electrode in the driving transistor. A light sensing accuracy and a light sensing signal to noise ratio (SNR) of the display apparatus including a plurality of such light sensing capacitors may be improved relative to ones that do not include such light sensing capacitors.

公开(公告)号：US09626912B2

公开(公告)日：2017-04-18

申请号：US14788553

申请日：2015-06-30

Applicant: Samsung Display Co. Ltd.

Inventor： Jung-Taek Kim ,  Joon-Chul Goh ,  Soo-Yeon Lee ,  Kyoung-Ho Lim ,  Young-Woo Choi

IPC: G09G3/30 ,  G09G3/3266 ,  G09G3/3233 ,  G09G3/20

CPC classification number: G09G3/3266 ,  G09G3/2022 ,  G09G3/3233 ,  G09G2300/0426 ,  G09G2310/021 ,  G09G2310/0218 ,  G09G2310/0221

Abstract: An electroluminescent display and a method of driving the same are disclosed. In one aspect, the display includes a display panel including a plurality of pixel units electrically connected to a plurality of data lines and a plurality of gate lines. The pixel units are arranged in a matrix of a plurality of rows and a plurality of columns, the pixel units in the same column are connected to the same data line, and the pixel units in the same diagonal line of the matrix are connected to the same gate line. The display also includes a data driver located at a first side of the display panel, the data driver being configured to drive the data lines, and a gate driver located at the first side of the display panel and configured to drive the gate lines.