公开(公告)号：US20130130437A1

公开(公告)日：2013-05-23

申请号：US13717806

申请日：2012-12-18

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO.,LTD.

Inventor： Shunpei Yamazaki ,  Miyuki Hosoba ,  Junichiro Sakata ,  Hideaki Kuwabara

IPC: H01L29/66

CPC classification number: H01L29/78606 ,  G02F1/1339 ,  G02F1/134336 ,  G02F1/1345 ,  G02F1/136227 ,  G02F1/136286 ,  G02F1/1368 ,  G02F1/167 ,  G02F2001/13606 ,  G02F2201/123 ,  G09G3/344 ,  G09G3/3677 ,  G09G2300/0426 ,  G09G2310/0286 ,  G09G2310/08 ,  H01L27/1218 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1255 ,  H01L27/1274 ,  H01L27/3262 ,  H01L29/45 ,  H01L29/513 ,  H01L29/518 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/786 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78696

Abstract: An object is to provide a semiconductor device having a structure in which parasitic capacitance between wirings can be efficiently reduced. In a bottom gate thin film transistor using an oxide semiconductor layer, an oxide insulating layer used as a channel protection layer is formed above and in contact with part of the oxide semiconductor layer overlapping with a gate electrode layer, and at the same time an oxide insulating layer covering a peripheral portion (including a side surface) of the stacked oxide semiconductor layer is formed. Further, a source electrode layer and a drain electrode layer are formed in a manner such that they do not overlap with the channel protection layer. Thus, a structure in which an insulating layer over the source electrode layer and the drain electrode layer is in contact with the oxide semiconductor layer is provided.

Abstract translation: 目的在于提供一种半导体器件，其具有可以有效地减少布线之间的寄生电容的结构。 在使用氧化物半导体层的底栅薄膜晶体管中，用作沟道保护层的氧化物绝缘层形成在与栅电极层重叠的氧化物半导体层的一部分上方并与其形成接触，同时氧化物 形成覆盖层叠氧化物半导体层的周边部（包括侧面）的绝缘层。 此外，以与沟道保护层不重叠的方式形成源极电极层和漏极电极层。 因此，提供了源极电极层和漏电极层上的绝缘层与氧化物半导体层接触的结构。