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公开(公告)号:US12026011B2
公开(公告)日:2024-07-02
申请号:US17233669
申请日:2021-04-19
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Hideaki Kuwabara , Masaaki Hiroki
IPC: G06F1/16 , G02F1/1333 , G02F1/1345 , G02F1/1368
CPC classification number: G06F1/163 , G02F1/133305 , G02F1/13452 , G02F1/1368 , G06F1/1635 , G06F1/1643 , G06F1/1654
Abstract: A novel electronic device is provided. Alternatively an electronic device of a novel embodiment is provided. An electronic device includes a ring portion and a display portion. The display portion is flexible. The display portion has a top surface and a first side surface in contact with at least one side of the top surface. The first side surface has a curved surface. The top surface includes a first display region. The first side surface includes a second display region. The first display region and the second display region are continuously provided. The electronic device is mounted such that the ring portion is in contact with a user's finger.
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公开(公告)号:US11947228B2
公开(公告)日:2024-04-02
申请号:US17412495
申请日:2021-08-26
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei Yamazaki , Miyuki Hosoba , Junichiro Sakata , Hideaki Kuwabara
IPC: H01L27/12 , G02F1/1362 , H01L29/45 , H01L29/51 , H01L29/66 , H01L29/786 , G02F1/1339 , G02F1/1343 , G02F1/1345 , G02F1/136 , G02F1/1368 , G02F1/167 , G09G3/34 , G09G3/36 , H10K59/121
CPC classification number: G02F1/136227 , H01L27/1218 , H01L27/1225 , H01L27/124 , H01L27/1248 , H01L27/1255 , H01L27/1274 , H01L29/45 , H01L29/513 , H01L29/518 , H01L29/66742 , H01L29/66969 , H01L29/786 , H01L29/78606 , H01L29/78648 , H01L29/7869 , H01L29/78696 , G02F1/1339 , G02F1/134336 , G02F1/1345 , G02F1/13606 , G02F1/136286 , G02F1/1368 , G02F1/167 , G02F2201/123 , G09G3/344 , G09G3/3677 , G09G2300/0426 , G09G2310/0286 , G09G2310/08 , H10K59/1213
Abstract: An object is to provide a semiconductor device having a structure in which parasitic capacitance between wirings can be efficiently reduced. In a bottom gate thin film transistor using an oxide semiconductor layer, an oxide insulating layer used as a channel protection layer is formed above and in contact with part of the oxide semiconductor layer overlapping with a gate electrode layer, and at the same time an oxide insulating layer covering a peripheral portion (including a side surface) of the stacked oxide semiconductor layer is formed. Further, a source electrode layer and a drain electrode layer are formed in a manner such that they do not overlap with the channel protection layer. Thus, a structure in which an insulating layer over the source electrode layer and the drain electrode layer is in contact with the oxide semiconductor layer is provided.
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公开(公告)号:US11442302B2
公开(公告)日:2022-09-13
申请号:US16928102
申请日:2020-07-14
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Shingo Eguchi , Hideaki Kuwabara , Kazune Yokomizo
IPC: G02F1/1333 , H01L29/786 , G09F9/46 , G09F9/30 , H01L27/32 , H05B33/02 , H01L51/50 , H05B33/14 , H05B33/22
Abstract: A semiconductor device including a large display portion with improved portability is provided. The display device includes a first display panel, a second display panel, and an adhesive layer. The area of the second display panel is larger than the area of the first display panel. The first display panel includes a first substrate, a second substrate, and a reflective liquid crystal element and a first transistor each positioned between the first substrate and the second substrate. The second display panel includes a first resin layer having flexibility, a second resin layer having flexibility, and a light-emitting element and a second transistor each positioned between the first resin layer and the second resin layer. The liquid crystal element has a function of reflecting light toward the second substrate side. The light-emitting element has a function of emitting light toward the second resin layer side. The first substrate and part of the second resin layer are bonded to each other with the adhesive layer.
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公开(公告)号:US10816841B2
公开(公告)日:2020-10-27
申请号:US16324649
申请日:2017-08-03
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Shingo Eguchi , Hideaki Kuwabara , Kazune Yokomizo
IPC: G02F1/1333 , G09F9/30 , H01L29/786 , G09F9/46 , H01L27/32 , H05B33/02 , H01L51/50 , H05B33/14 , H05B33/22
Abstract: A semiconductor device including a large display portion with improved portability is provided. The display device includes a first display panel, a second display panel, and an adhesive layer. The area of the second display panel is larger than the area of the first display panel. The first display panel includes a first substrate, a second substrate, and a reflective liquid crystal element and a first transistor each positioned between the first substrate and the second substrate. The second display panel includes a first resin layer having flexibility, a second resin layer having flexibility, and a light-emitting element and a second transistor each positioned between the first resin layer and the second resin layer. The liquid crystal element has a function of reflecting light toward the second substrate side. The light-emitting element has a function of emitting light toward the second resin layer side. The first substrate and part of the second resin layer are bonded to each other with the adhesive layer.
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公开(公告)号:US10678107B2
公开(公告)日:2020-06-09
申请号:US16411594
申请日:2019-05-14
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei Yamazaki , Yukie Suzuki , Hideaki Kuwabara , Hajime Kimura
IPC: G02F1/1368 , G02F1/1339 , H01L29/66 , H01L27/12 , H01L29/04 , H01L29/786 , G02F1/1362 , G02F1/1333 , G02F1/1343 , H01L29/45 , H01L29/49
Abstract: A method of manufacturing, with high mass productivity, liquid crystal display devices having highly reliable thin film transistors with excellent electric characteristics is provided. In a liquid crystal display device having an inverted staggered thin film transistor, the inverted staggered thin film transistor is formed as follows: a gate insulating film is formed over a gate electrode; a microcrystalline semiconductor film which functions as a channel formation region is formed over the gate insulating film; a buffer layer is formed over the microcrystalline semiconductor film; a pair of source and drain regions are formed over the buffer layer; and a pair of source and drain electrodes are formed in contact with the source and drain regions so as to expose a part of the source and drain regions.
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公开(公告)号:US10592094B2
公开(公告)日:2020-03-17
申请号:US15874279
申请日:2018-01-18
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei Yamazaki , Hajime Kimura , Hideaki Kuwabara , Koji Dairiki
IPC: G06F3/0488 , G06F1/3234
Abstract: A data processing device which includes a flexible position input portion for sensing proximity or a touch of an object such as a user's palm and finger. In the case where a first region of the flexible position input portion is held by a user for a certain period, supply of image signals to the first region is selectively stopped.
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公开(公告)号:US20200052003A1
公开(公告)日:2020-02-13
申请号:US16546469
申请日:2019-08-21
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei Yamazaki , Hiroki Ohara , Toshinari Sasaki , Kosei Noda , Hideaki Kuwabara
IPC: H01L27/12 , H01L29/24 , G02F1/1368 , G02F1/1362 , G02F1/1343 , G02F1/1337 , G02F1/1333 , H01L29/51 , H01L29/786
Abstract: An object is to provide a semiconductor device having a structure with which parasitic capacitance between wirings can be sufficiently reduced. An oxide insulating layer serving as a channel protective layer is formed over part of an oxide semiconductor layer overlapping with a gate electrode layer. In the same step as formation of the oxide insulating layer, an oxide insulating layer covering a peripheral portion of the oxide semiconductor layer is formed. The oxide insulating layer which covers the peripheral portion of the oxide semiconductor layer is provided to increase the distance between the gate electrode layer and a wiring layer formed above or in the periphery of the gate electrode layer, whereby parasitic capacitance is reduced.
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公开(公告)号:US10516118B2
公开(公告)日:2019-12-24
申请号:US15272533
申请日:2016-09-22
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Hideaki Kuwabara
Abstract: A power saving system using a plurality of flexible display devices placed on various places is provided. A structure of a bendable portion in a display device is improved. Specifically, a wiring partly including a metal nanoparticle is used. Openings are formed in an insulating layer so that the wiring becomes substantially longer by meandering in cross section. When a plurality of openings are formed and aligned, a portion that is easy to bend is formed along the line where they are aligned. A plurality of display panels are used for one display portion. The flexible display portion can be provided on a surface, specifically, a curved surface of furniture such as a chair or a sofa.
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公开(公告)号:US10170528B2
公开(公告)日:2019-01-01
申请号:US15225166
申请日:2016-08-01
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Hideaki Kuwabara
IPC: G02F1/133 , H01L27/32 , G02F1/1343 , G02F1/1368 , H01L27/12 , H01L29/423 , H01L29/786 , G02F1/1333 , G02F1/1335 , G02F1/1337
Abstract: Provided is a novel display panel that is highly convenient or reliable. The display device has two display modes: a reflective display mode and a light-emitting display mode. In the light-emitting display mode, light display is performed by transmitting light from a light-emitting element overlapping with an opening in a pixel electrode of a reflective display element. A switching element of the reflective display element and a switching element electrically connected to the light-emitting element are formed over one substrate. They are each a transistor whose channel formation region is formed in a silicon-containing film, specifically a polysilicon film.
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公开(公告)号:US10079306B2
公开(公告)日:2018-09-18
申请号:US15368984
申请日:2016-12-05
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei Yamazaki , Miyuki Hosoba , Junichiro Sakata , Hideaki Kuwabara
IPC: H01L29/00 , H01L27/00 , H01L29/786 , G02F1/1362 , H01L27/12 , H01L29/66 , H01L29/45 , H01L29/51 , G02F1/167 , G02F1/136 , H01L27/32 , G02F1/1339 , G02F1/1343 , G02F1/1345 , G02F1/1368 , G09G3/34 , G09G3/36
CPC classification number: H01L29/78606 , G02F1/1339 , G02F1/134336 , G02F1/1345 , G02F1/136227 , G02F1/136286 , G02F1/1368 , G02F1/167 , G02F2001/13606 , G02F2201/123 , G09G3/344 , G09G3/3677 , G09G2300/0426 , G09G2310/0286 , G09G2310/08 , H01L27/1218 , H01L27/1225 , H01L27/124 , H01L27/1248 , H01L27/1255 , H01L27/1274 , H01L27/3262 , H01L29/45 , H01L29/513 , H01L29/518 , H01L29/66742 , H01L29/66969 , H01L29/786 , H01L29/78648 , H01L29/7869 , H01L29/78696
Abstract: An object is to provide a semiconductor device having a structure in which parasitic capacitance between wirings can be efficiently reduced. In a bottom gate thin film transistor using an oxide semiconductor layer, an oxide insulating layer used as a channel protection layer is formed above and in contact with part of the oxide semiconductor layer overlapping with a gate electrode layer, and at the same time an oxide insulating layer covering a peripheral portion (including a side surface) of the stacked oxide semiconductor layer is formed. Further, a source electrode layer and a drain electrode layer are formed in a manner such that they do not overlap with the channel protection layer. Thus, a structure in which an insulating layer over the source electrode layer and the drain electrode layer is in contact with the oxide semiconductor layer is provided.
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