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公开(公告)号:US20190181180A1
公开(公告)日:2019-06-13
申请号:US15839011
申请日:2017-12-12
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Francois Roy
IPC: H01L27/148 , H01L27/146
Abstract: An imaging cell includes a skimming gate transistor coupled between a photosensitive charge node and an intermediate node and a transfer gate transistor coupled between the intermediate node and a sense node. The skimming gate transistor includes a vertical gate electrode structure formed by a first capacitive deep trench isolation extending into a substrate and a second capacitive deep trench isolation extending into the substrate. A channel of the skimming gate transistor is positioned between the first and second capacitive deep trench isolations. Each capacitive deep trench isolation is formed by a trench that is lined with an insulating liner and filled with a conductive or semiconductive material.
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公开(公告)号:US20180366510A1
公开(公告)日:2018-12-20
申请号:US16112241
申请日:2018-08-24
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Francois Roy , Frédéric Lalanne , Pierre Emmanuel Marie Malinge
IPC: H01L27/146 , H04N5/378
CPC classification number: H01L27/14643 , H01L27/14612 , H01L27/14636 , H01L27/14638 , H01L27/14641 , H01L27/14689 , H04N5/378
Abstract: An image sensor device may include an array of image sensing pixels arranged in rows and columns. Each image sensing pixel may include an image sensing photodiode, a first source follower transistor coupled to the image sensing photodiode, and a switch coupled to the image sensing photodiode. Each image sensor device may include a second source follower transistor coupled to the switch, and a row selection transistor coupled to the first and second source follower transistors.
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公开(公告)号:US20180278863A1
公开(公告)日:2018-09-27
申请号:US15995249
申请日:2018-06-01
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Francois Roy
IPC: H04N5/353 , H04N5/378 , H04N5/372 , H01L27/146 , H04N5/363
CPC classification number: H04N5/353 , H01L27/14614 , H01L27/1464 , H01L27/14643 , H04N5/363 , H04N5/372 , H04N5/378
Abstract: Each pixel of a global shutter back-side illuminated image sensor includes a photosensitive area. On a front surface, a first transistor includes a vertical ring-shaped electrode penetrating into the photosensitive area and laterally delimiting a memory area. The memory area penetrates into the photosensitive area less deeply than the insulated vertical ring-shaped electrode. A read area is formed in an intermediate area which is formed in the memory area. The memory area, the intermediate area and read area define a second transistor having an insulated horizontal electrode forming a gate of the second transistor. The memory area may be formed by a first and second memory areas and an output signal is generated indicative of a difference between charge stored in the first memory area and charge stored in the second memory area after a charge transfer to the first memory area.
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公开(公告)号:US20180270439A1
公开(公告)日:2018-09-20
申请号:US15985998
申请日:2018-05-22
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Francois Guyader , Francois Roy
IPC: H04N5/374 , H04N5/378 , H04N5/353 , H01L27/146
CPC classification number: H04N5/3742 , H01L27/14614 , H01L27/14623 , H01L27/14629 , H01L27/1463 , H01L27/14634 , H01L27/1464 , H01L27/14643 , H04N5/353 , H04N5/378
Abstract: A global shutter image sensor of a back-illuminated type includes a semiconductor substrate and pixels. Each pixel includes a photosensitive area, a storage area, a readout area and areas for transferring charges between these different areas. The image sensor includes, for each pixel, a protector extending at least partly into the substrate from the back of the substrate to ensure that the storage area is protected against back illumination.
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公开(公告)号:US20180158860A1
公开(公告)日:2018-06-07
申请号:US15366958
申请日:2016-12-01
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Francois Roy
IPC: H01L27/146 , H01L23/532 , H01L29/49
CPC classification number: H01L27/14636 , H01L23/53271 , H01L27/14614 , H01L27/14634 , H01L27/14689
Abstract: An image sensor includes a first semiconductor substrate supporting a photodiode and a source region of a transfer transistor. A first interconnect level on the first semiconductor substrate includes an interconnection dielectric layer on the first semiconductor substrate and interconnect line layers over the interconnection dielectric layer. A second semiconductor substrate that supports readout transistors is mounted over the first semiconductor substrate and first interconnect level. The first interconnect level further includes a first doped semiconductor material electrical connection in physical and electrical contact with the source region in the first semiconductor substrate that passes through the interconnection dielectric layer and the interconnect line layers to electrically connect to at least one transistor of the readout transistors.
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公开(公告)号:US09941200B1
公开(公告)日:2018-04-10
申请号:US15275619
申请日:2016-09-26
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Francois Roy
IPC: H01L23/52 , H01L25/065 , H01L23/522
CPC classification number: H01L23/5226 , H01L25/0657
Abstract: A first semiconductor substrate layer supports a first transistor including a first source-drain formed by a doped region of the substrate layer. A second semiconductor substrate layer supports a second transistor including a second source-drain formed by a doped region of the substrate layer. The second semiconductor substrate layer is stacked over the first semiconductor substrate layer and separated therefrom by an insulating layer. A metal wiring extends from an electrical contact with the doped region for the first source-drain, through the insulating layer and passing through an electrical isolation structure in the second semiconductor substrate layer to make an electrical contact with the doped region for the second source-drain. The electrical isolation structure is formed by one of a trench isolation or the doped region of the second source-drain itself. The isolation structure has a thickness equal to a thickness of the second semiconductor substrate layer.
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公开(公告)号:US20170221946A1
公开(公告)日:2017-08-03
申请号:US15488691
申请日:2017-04-17
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Francois Roy , Philippe Are
IPC: H01L27/146 , H01L27/148
CPC classification number: H01L27/14607 , H01L27/1461 , H01L27/14612 , H01L27/14614 , H01L27/1463 , H01L27/14636 , H01L27/14638 , H01L27/14643 , H01L27/14812
Abstract: An image sensor includes a control circuit and pixels. Each pixel includes: a photosensitive area, a substantially rectangular storage area adjacent to the photosensitive area, and a read area. First and second insulated vertical electrodes electrically connected to each other are positioned opposite each other and delimit the storage area. The first electrode extends between the storage area and the photosensitive area. The second electrode includes a bent extension opposite a first end of the first electrode, with the storage area emerging onto the photosensitive area on the side of the first end. The control circuit operates to apply a first voltage to the first and second electrodes to perform a charge transfer, and a second voltage to block charge transfer.
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公开(公告)号:US20170125474A1
公开(公告)日:2017-05-04
申请号:US15136569
申请日:2016-04-22
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Francois Roy , Philippe Are
IPC: H01L27/146
CPC classification number: H01L27/14607 , H01L27/1461 , H01L27/14612 , H01L27/14614 , H01L27/1463 , H01L27/14636 , H01L27/14638 , H01L27/14643 , H01L27/14812
Abstract: An image sensor including a control circuit and a plurality of pixels, each pixel including: a photosensitive area, a substantially rectangular storage area adjacent to the photosensitive area, and a read area; first and second insulated vertical electrodes electrically connected to each other, opposite each other, and delimiting the storage area, the first electrode extending between the storage area and the photosensitive area, the second electrode including a bent extension opposite a first end of the first electrode, the storage area emerging onto the photosensitive area on the side of the first end, the control circuit being capable of applying a first voltage to the first and second electrodes to perform a charge transfer, and a second voltage to block said transfer.
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公开(公告)号:US20150279878A1
公开(公告)日:2015-10-01
申请号:US14644795
申请日:2015-03-11
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Nayera Ahmed , Francois Roy
IPC: H01L27/146
CPC classification number: H01L27/1463 , H01L27/14643 , H01L27/14685 , H01L27/14689 , H01L27/14698
Abstract: A structure of insulation between photodiodes formed in a doped semiconductor layer of a first conductivity type extending on a doped semiconductor substrate of the second conductivity type, the insulating structure including a trench crossing the semiconductor layer, the trench walls being coated with an insulating layer, the trench being filled with a conductive material and being surrounded with a P-doped area, more heavily doped than the semiconductor layer.
Abstract translation: 在第二导电类型的掺杂半导体衬底上延伸的第一导电类型的掺杂半导体层中形成的光电二极管之间的绝缘结构,所述绝缘结构包括与半导体层交叉的沟槽,所述沟壁涂覆有绝缘层, 该沟槽被一个导电材料填充并且被比该半导体层更重掺杂的P掺杂区包围。
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公开(公告)号:US20150021459A1
公开(公告)日:2015-01-22
申请号:US14335095
申请日:2014-07-18
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Francois Roy
IPC: H01L31/103 , H01L27/146 , H04N5/378
CPC classification number: H01L31/103 , H01L27/14612 , H01L27/14643 , H04N5/378
Abstract: An image sensor cell formed inside and on top of a substrate of a first conductivity type, including: a read region of the second conductivity type; and, adjacent to the read region, a storage region of the first conductivity type topped with a first insulated gate electrode. The first electrode is arranged to receive, in a first operating mode, a first voltage causing the inversion of the conductivity type of the storage region, so that the storage region behaves as an extension of the read region, and, in a second operating mode, a second voltage causing no inversion of the storage region.
Abstract translation: 在第一导电类型的衬底的内部和顶部形成的图像传感器单元,包括:第二导电类型的读取区域; 并且与读取区域相邻的第一导电类型的存储区域顶上第一绝缘栅电极。 第一电极被布置成在第一操作模式下接收导致存储区域的导电类型的反转的第一电压,使得存储区域表现为读取区域的延伸,并且在第二操作模式 ,不会导致存储区域的反转的第二电压。
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