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    Enhanced multi-streaming though statistical analysis
    61.
    发明授权
    Enhanced multi-streaming though statistical analysis 有权

    公开(公告)号：US09898202B2

    公开(公告)日：2018-02-20

    申请号：US15146708

    申请日：2016-05-04

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jason Martineau ,  William David Schwaderer ,  Changho Choi

    IPC: G06F3/06

    CPC classification number: G06F3/061 ,  G06F3/0616 ,  G06F3/064 ,  G06F3/0659 ,  G06F3/0665 ,  G06F3/0679 ,  G06F3/0688

    Abstract: A system and method for using a Solid State Drive (SSD) (505) are described. Reception circuitry (510) may receive write requests (1610, 1615, 1620, 1625) and invalidate requests (1630, 1635, 1640) from a first stream (305, 320, 335, 350). The write requests (1610, 1615, 1620, 1625) may request that data be written to storage (520) on the SSD (505); invalidate requests (1630, 1635, 1640) may invalidate data written to the storage (520). A statistics calculation logic (1705) may calculate statistics (1410, 1415, 1510) for the stream based on the write requests (1610, 1615, 1620, 1625) and the invalidate requests (1630, 1635, 1640). A performance logic (1710) may use the calculated statistics (1410, 1415, 1510) to improve the performance of the SSD (505).

    HEURISTIC INTERFACE FOR ENABLING A COMPUTER DEVICE TO UTILIZE DATA PROPERTY-BASED DATA PLACEMENT INSIDE A NONVOLATILE MEMORY DEVICE
    64.
    发明申请
    HEURISTIC INTERFACE FOR ENABLING A COMPUTER DEVICE TO UTILIZE DATA PROPERTY-BASED DATA PLACEMENT INSIDE A NONVOLATILE MEMORY DEVICE 审中-公开
    用于启用计算机设备的智能接口，以利用非易失性存储器件内的基于数据属性的数据放置

    公开(公告)号：US20170017663A1

    公开(公告)日：2017-01-19

    申请号：US15090799

    申请日：2016-04-05

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jianjian Huo ,  Changho Choi ,  Derrick Tseng ,  Praveen Krishnamoorthy ,  Hingkwan Huen

    IPC: G06F17/30 ,  G06F3/06

    CPC classification number: G06F16/1727 ,  G06F3/061 ,  G06F3/0619 ,  G06F3/0643 ,  G06F3/0652 ,  G06F3/0679 ,  G06F3/0688 ,  G06F12/0246 ,  G06F16/2365

    Abstract: An interface for enabling a computer device to utilize data property-based data placement inside a nonvolatile memory device comprises: executing a software component at an operating system level in the computer device that monitors update statistics of all data item modifications into the nonvolatile memory device, including one or more of update frequencies for each data item, accumulated update and delete frequencies specific to each file type, and an origin of the data item; storing the update statistics of each of the data items and each of the data item types in a database; and intercepting all operations, including create, write, and update, of performed by applications to all the data items, and automatically assigning a data property identifier to each of the data items based on current update statistics in the database, such that the data items and assigned data property identifiers are transmitted over a memory channel to the non-volatile memory device.

    Abstract translation: 一种用于使计算机设备能够利用非易失性存储器件内的基于数据属性的数据放置的接口包括：在所述计算机设备中的操作系统级执行软件组件，所述软件组件监视所有数据项修改的更新统计信息到所述非易失性存储器设备中， 包括每个数据项的更新频率，对每个文件类型特定的累积更新和删除频率的一个或多个以及数据项的来源; 将每个数据项和每个数据项类型的更新统计信息存储在数据库中; 并截取应用程序对所有数据项执行的所有操作，包括创建，写入和更新，以及根据数据库中的当前更新统计信息自动将数据属性标识符分配给每个数据项，使得数据项 并且分配的数据属性标识符通过存储器通道发送到非易失性存储器件。

    ELECTRONIC SYSTEM WITH MESSAGE MECHANISM AND METHOD OF OPERATION THEREOF
    65.
    发明申请
    ELECTRONIC SYSTEM WITH MESSAGE MECHANISM AND METHOD OF OPERATION THEREOF 有权
    具有消息机制的电子系统及其操作方法

    公开(公告)号：US20160117100A1

    公开(公告)日：2016-04-28

    申请号：US14674906

    申请日：2015-03-31

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Changho Choi

    IPC: G06F3/06

    CPC classification number: G06F3/061 ,  G06F3/0659 ,  G06F3/067

    Abstract: An electronic system includes: a storage interface unit configured to receive an I/O command request with a logical block address field; a logical block address message unit, connected to the storage interface unit, configured to extract an embedded message from the logical block address field; and a storage controller unit, connected to the logical block address message unit, configured to process the embedded message.

    Abstract translation: 电子系统包括：存储接口单元，被配置为用逻辑块地址字段接收I / O命令请求; 连接到所述存储接口单元的逻辑块地址消息单元，被配置为从所述逻辑块地址字段提取嵌入的消息; 以及存储控制器单元，连接到所述逻辑块地址消息单元，被配置为处理所述嵌入消息。

    Multi-non-volatile memory solid state drive block-level failure prediction with separate log per non-volatile memory
    67.
    发明授权
    Multi-non-volatile memory solid state drive block-level failure prediction with separate log per non-volatile memory 有权

    公开(公告)号：US12174718B2

    公开(公告)日：2024-12-24

    申请号：US17964013

    申请日：2022-10-11

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Nima Elyasi ,  Changho Choi

    IPC: G06F11/30 ,  G06F3/06 ,  G06F11/07

    Abstract: A storage device is disclosed. A first storage media may store data. The first storage media may be of a first storage type and may be organized into at least two blocks. A second storage media may also store data. The second storage media may be of a second storage type different from the first type, and may also be organized into at least two blocks. A controller may manage reading data from and writing data to the first storage media and the second storage media. Metadata storage may store device-based log data for errors in the storage device. The drive-based log data may include a first log data for the first storage media and a second log data for the second storage media. An identification circuit may identify a suspect block in the at least two blocks in the first storage media and the second storage media, responsive to the device-based log data.

    SYSTEMS AND METHODS FOR SYNCHRONOUS CELL SWITCHING FOR SCALABLE MEMORY
    69.
    发明申请
    SYSTEMS AND METHODS FOR SYNCHRONOUS CELL SWITCHING FOR SCALABLE MEMORY 有权

    公开(公告)号：US20240378149A1

    公开(公告)日：2024-11-14

    申请号：US18211131

    申请日：2023-06-16

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Byung Hee Choi ,  Changho Choi

    IPC: G06F12/0815 ,  G06F1/12

    Abstract: A system includes: a group of memory resources including a first memory node and a second memory node, the first memory node being connected to the second memory node over a switching fabric; and a synchronous clock source connected to the first memory node and the second memory node, the synchronous clock source to provide a synchronized clock signal to the first memory node and the second memory node to synchronize the first memory node with the second memory node. The first memory node and the second memory node are to encode memory data and decode encoded memory data using the synchronized clock signal.

    SYSTEMS AND METHODS FOR MONITORING MEMORY ACCESSES
    70.
    发明公开
    SYSTEMS AND METHODS FOR MONITORING MEMORY ACCESSES 审中-公开

    公开(公告)号：US20240303001A1

    公开(公告)日：2024-09-12

    申请号：US18139198

    申请日：2023-04-25

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Mukesh Garg ,  Ramzi Ammari ,  Changho Choi

    IPC: G06F3/06

    CPC classification number: G06F3/0671 ,  G06F3/061 ,  G06F3/0653

    Abstract: Systems and methods for monitoring memory accesses. A storage system comprises a first memory device, a second memory device, and a controller configured to communicate with the first memory device and the second memory device. The controller is configured to: receive, from a computing device, a first request for first data; identify a first address based on the first request; search the first memory device for the first address; modify a first count maintained in the second memory device for the first address; receive from the computing device a second request; and provide the first count in response to the second request.

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