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    TRANSMITTER AND PARITY PERMUTATION METHOD THEREOF
    63.
    发明申请
    TRANSMITTER AND PARITY PERMUTATION METHOD THEREOF 审中-公开
    发射机及其极性测试方法

    公开(公告)号：US20160261279A1

    公开(公告)日：2016-09-08

    申请号：US15058242

    申请日：2016-03-02

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Hong-sil JEONG ,  Kyung-Joong KIM ,  Se-ho MYUNG

    IPC: H03M13/11 ,  H04L27/36 ,  H03M13/00 ,  H04L1/00

    CPC classification number: H03M13/1148 ,  H03M13/1165 ,  H03M13/152 ,  H03M13/255 ,  H03M13/2707 ,  H03M13/2778 ,  H03M13/2906 ,  H03M13/611 ,  H03M13/6356 ,  H03M13/6362 ,  H04L1/0057 ,  H04L1/0068 ,  H04L1/0071 ,  H04L27/36

    Abstract: A transmitter is provided. The transmitter includes: a Low Density Parity Check (LDPC) encoder configured to encode input bits to generate parity bits; a parity permutator configured to perform parity permutation by interleaving the parity bits and group-wise interleaving a plurality of bit groups including the interleaved parity bits; and a puncturer configured to puncture some of the parity bits in the group-wise interleaved bit groups, wherein the parity permutator group-wise interleaves the bit groups such that some of the bit groups are positioned at predetermined positions, respectively, and a remainder of the bit groups are positioned without an order within the group-wise interleaved bit groups.

    Abstract translation: 提供发射机。 所述发射机包括：低密度奇偶校验（LDPC）编码器，被配置为编码输入比特以产生奇偶校验位; 配置为通过交织所述奇偶校验位并且逐组交织包括所述交错奇偶校验位的多个位组来执行奇偶校验排列的奇偶置换器; 以及穿孔器，被配置为对所述分组交织的比特组中的一些奇偶校验比特进行穿孔，其中，所述奇偶校验排列器分组地对所述比特组进行交织，使得所述一些比特组分别位于预定位置， 在组方式的交替位组中，位组被定位成没有顺序。

    TRANSMITTER APPARATUS AND INTERLEAVING METHOD THEREOF
    64.
    发明申请
    TRANSMITTER APPARATUS AND INTERLEAVING METHOD THEREOF 有权
    发射机装置及其交替方法

    公开(公告)号：US20160233892A1

    公开(公告)日：2016-08-11

    申请号：US15130096

    申请日：2016-04-15

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Kyung-Joong KIM ,  Se-ho MYUNG ,  Hong-sil JEONG ,  Daniel Ansorregui LOBETE ,  Belkacem MOUHOUCHE

    IPC: H03M13/27 ,  H04L1/00 ,  H04L27/04 ,  H03M13/11

    CPC classification number: H03M13/2792 ,  H03M13/1102 ,  H03M13/1165 ,  H03M13/1177 ,  H03M13/152 ,  H03M13/253 ,  H03M13/255 ,  H03M13/2707 ,  H03M13/2778 ,  H03M13/616 ,  H04L1/0041 ,  H04L1/0057 ,  H04L1/0071 ,  H04L27/04

    Abstract: A transmitting apparatus is provided. The transmitting apparatus includes: an encoder configured to generate a low-density parity check (LDPC) codeword by LDPC encoding of input bits based on a parity check matrix including information word bits and parity bits, the LDPC codeword including a plurality of bit groups each including a plurality of bits; an interleaver configured to interleave the LDPC codeword; and a modulator configured to map the interleaved LDPC codeword onto a modulation symbol, wherein the interleaver is further configured to interleave the LDPC codeword such that a bit included in a predetermined bit group from among the plurality of bit groups constituting the LDPC codeword onto a predetermined bit of the modulation symbol.

    Abstract translation: 提供发送装置。 发送装置包括：编码器，被配置为基于包括信息字比特和奇偶校验位的奇偶校验矩阵，通过输入比特的LDPC编码生成低密度奇偶校验（LDPC）码字，所述LDPC码字包括多个比特组 包括多个位; 配置为交织所述LDPC码字的交织器; 以及调制器，被配置为将交织的LDPC码字映射到调制符号，其中所述交织器还被配置为交织所述LDPC码字，使得包括在构成所述LDPC码字的所述多个比特组中的预定比特组中包括的比特到预定的 位的调制符号。

    PARITY CHECK MATRIX GENERATING METHOD, ENCODING APPARATUS, ENCODING METHOD, DECODING APPARATUS AND DECODING METHOD USING THE SAME
    66.
    发明申请
    PARITY CHECK MATRIX GENERATING METHOD, ENCODING APPARATUS, ENCODING METHOD, DECODING APPARATUS AND DECODING METHOD USING THE SAME 有权
    奇偶校验矩阵生成方法，编码装置，编码方法，解码装置和解码方法

    公开(公告)号：US20160013809A1

    公开(公告)日：2016-01-14

    申请号：US14794243

    申请日：2015-07-08

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Se-ho MYUNG ,  Hong-sil JEONG

    IPC: H03M13/11 ,  H03M13/27 ,  H03M13/00

    CPC classification number: H03M13/1177 ,  H03M13/1165 ,  H03M13/255 ,  H03M13/271 ,  H03M13/2792 ,  H03M13/616

    Abstract: A method of low density parity check (LDPC) encoding includes: receiving a plurality of information word bits; LDPC encoding the information word bits using a parity check matrix in which a sum of elements in same positions in a plurality of groups constituting the parity check matrix is less than 2; and generating LDPC codeword bits comprising the information word bits and parity bits as a result of the LDPC encoding, wherein each of the plurality of groups constituting comprises a same number of columns.

    Abstract translation: 低密度奇偶校验（LDPC）编码方法包括：接收多个信息字位; 使用奇偶校验矩阵对信息字比特进行LDPC编码，其中构成奇偶校验矩阵的多个组中的相同位置的元素之和小于2; 以及生成包括作为LDPC编码的结果的信息字位和奇偶校验位的LDPC码字比特，其中构成的多个组中的每一个组包括相同数量的列。

    METHOD AND APPARATUS FOR ENCODING AND DECODING OF LOW DENSITY PARITY CHECK CODES
    69.
    发明申请
    METHOD AND APPARATUS FOR ENCODING AND DECODING OF LOW DENSITY PARITY CHECK CODES 审中-公开
    用于编码和解码低密度奇偶校验码的方法和装置

    公开(公告)号：US20140372825A1

    公开(公告)日：2014-12-18

    申请号：US14303834

    申请日：2014-06-13

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Hong-sil JEONG ,  Se-ho MYUNG ,  Kyung-joong KIM

    IPC: H03M13/11

    CPC classification number: H03M13/1165 ,  H03M13/036 ,  H03M13/152 ,  H03M13/255 ,  H03M13/2906 ,  H03M13/6552

    Abstract: An encoding apparatus is provided. The encoding includes a low density parity check (LDPC) encoder which performs LDPC encoding on input bits based on a parity-check matrix to generate an LDPC codeword formed of 64,800 bits, in which the parity-check matrix includes an information word sub-matrix and a parity sub-matrix, the information word sub-matrix is formed of a group of a plurality of column blocks each including 360 columns, and the parity-check matrix and the information word sub-matrix are defined by various tables which represent positions of value one (1) present in every 360-th column.

    Abstract translation: 提供一种编码装置。 该编码包括：低密度奇偶校验（LDPC）编码器，其基于奇偶校验矩阵对输入比特执行LDPC编码，以生成由64,800比特形成的LDPC码字，其中奇偶校验矩阵包括信息字子矩阵 和奇偶校验子矩阵，信息字子矩阵由每个包括360列的多个列块的组形成，并且奇偶校验矩阵和信息字子矩阵由表示位置的各种表定义 的价值一（1）存在于每第360列。

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