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98 条记录 (耗时 0.048 秒)

    METHOD FOR PRODUCING TOOTH
    62.
    发明申请
    METHOD FOR PRODUCING TOOTH 有权
    生产牙科的方法

    公开(公告)号：US20110306135A1

    公开(公告)日：2011-12-15

    申请号：US13146029

    申请日：2010-01-14

    申请人： Takashi Tsuji ,  Kazuhisa Nakao

    发明人： Takashi Tsuji ,  Kazuhisa Nakao

    IPC分类号： C12N5/077

    CPC分类号： A61L27/3886 ,  A61L27/3804 ,  A61L27/3865

    摘要： A method for producing a tooth having a desired length in one direction includes the steps of: placing a first cell aggregate and a second cell aggregate in the inside of a support while bringing the first and the second cell aggregates into close contact with each other; and culturing the first and the second cell aggregates in the inside of the support, in which the first cell aggregate is composed of one of mesenchymal cells or epithelial cells and the second cell aggregate is composed of the other, and the size of the tooth is controlled by adjusting the length of contact between the first cell aggregate and the second cell aggregate in one direction.

    摘要翻译： 一种在一个方向上具有期望长度的牙齿的制造方法包括以下步骤：将第一细胞聚集体和第二细胞聚集体放置在支撑体的内部，同时使第一和第二细胞聚集体彼此紧密接触; 并且在第一细胞集合体由间充质细胞或上皮细胞之一构成的载体内部培养第一和第二细胞聚集体，第二细胞集合体由另一个组成，并且牙齿的尺寸为 通过在一个方向上调节第一细胞聚集体和第二细胞聚集体之间的接触长度来控制。

    Trench MOS type silicon carbide semiconductor device
    66.
    发明申请
    Trench MOS type silicon carbide semiconductor device 有权
    沟槽MOS型碳化硅半导体器件

    公开(公告)号：US20090315039A1

    公开(公告)日：2009-12-24

    申请号：US12461713

    申请日：2009-08-21

    申请人： Takashi Tsuji

    发明人： Takashi Tsuji

    IPC分类号： H01L29/24 ,  H01L29/78

    CPC分类号： H01L29/7813 ,  H01L21/047 ,  H01L29/0623 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/1608 ,  H01L29/41766 ,  H01L29/66068

    摘要： A trench MOS type SiC semiconductor device includes a first conductivity semiconductor substrate, a first conductivity drift layer on the substrate, a second conductivity base layer on the drift layer, a first conductivity source layer on the base layer, a stripe shaped trench reaching from the surface of the source layer to the drift layer and having a gate electrode via a gate oxide film, a second conductivity layer on the bottom of the trench, and a second conductivity type region thereon on across-the-width side walls of at least one end of the trench, electrically coupling the second conductivity layer with the base layer. The device allows a low on-resistance without newly forming an electrode connected to the second conductivity layer even in the case of a device in which the second conductivity layer has to be grounded.

    摘要翻译： 沟槽MOS型SiC半导体器件包括第一导电半导体衬底，衬底上的第一电导率漂移层，漂移层上的第二导电性基底层，基底层上的第一导电源层， 源极层的表面到漂移层，并且通过栅极氧化膜具有栅电极，在沟槽的底部具有第二导电层，并且在其上的至少一个的宽度侧壁上的第二导电类型区域 沟槽的端部，将第二导电层与基底层电耦合。 即使在第二导电层必须接地的装置的情况下，该装置也允许低导通电阻而不新形成连接到第二导电层的电极。

    Semiconductor device and manufacturing method thereof
    67.
    发明授权
    Semiconductor device and manufacturing method thereof 有权
    半导体装置及其制造方法

    公开(公告)号：US07615849B2

    公开(公告)日：2009-11-10

    申请号：US11530850

    申请日：2006-09-11

    申请人： Shun-Ichi Nakamura ,  Yoshiyuki Yonezawa ,  Hiroyuki Fujisawa ,  Takashi Tsuji

    发明人： Shun-Ichi Nakamura ,  Yoshiyuki Yonezawa ,  Hiroyuki Fujisawa ,  Takashi Tsuji

    IPC分类号： H01L29/04 ,  H01L29/06

    CPC分类号： H01L29/7813 ,  H01L21/046 ,  H01L29/045 ,  H01L29/0878 ,  H01L29/1608 ,  H01L29/4236 ,  H01L29/66068 ,  Y10S438/931

    摘要： In a semiconductor device having SiC vertical trench MOSFETs, it is aimed to prevent the generation of large scattering in the channel resistance without largely increasing the average value of channel resistance. A 4H-SiC substrate having a major face thereof that is generally a {0001} face and having an off angle α. The trench is formed with the standard deviation σ in scattering of the angle formed by a trench side wall face and a substrate major face within a wafer face. By setting the designed value of the angle formed by the trench side wall face and the substrate major face at an any angle ranging from [(60 degrees)+2σ] to [(90 degrees)−tan−1 (0.87×tan α)−2σ] in forming the trench in the SiC substrate, a semiconductor device in which the angle formed by the trench side wall face and the substrate major face is 60 degrees or more but not more than [(90 degrees)−tan−1 (0.87×tan α)] can be obtained.

    摘要翻译： 在具有SiC垂直沟槽MOSFET的半导体器件中，旨在防止在沟道电阻中产生大的散射，而不会大大增加沟道电阻的平均值。 具有主面的4H-SiC衬底通常为{0001}面并具有偏角α。 沟槽由晶片面内的沟槽侧壁面和基板主面所形成的角度的散射形成有标准偏差σ。 通过将沟槽侧壁面和基板主面形成的角度的设计值设定为从[（60度）+2σ]到[（90度）-an-1（0.87葡萄糖α） - 在SiC衬底中形成沟槽的半导体器件，其中由沟槽侧壁面和衬底主面形成的角度为60度以上但不大于[（90度）-an -1（0.87） xtan alpha）]。

    Trench MOS type silicon carbide semiconductor device and method for manufacturing the same
    68.
    发明授权
    Trench MOS type silicon carbide semiconductor device and method for manufacturing the same 有权
    沟槽MOS型碳化硅半导体器件及其制造方法

    公开(公告)号：US07595238B2

    公开(公告)日：2009-09-29

    申请号：US11775123

    申请日：2007-07-09

    申请人： Takashi Tsuji

    发明人： Takashi Tsuji

    IPC分类号： H01L21/336

    CPC分类号： H01L29/7813 ,  H01L21/047 ,  H01L29/0623 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/1608 ,  H01L29/41766 ,  H01L29/66068

    摘要： A trench MOS type SiC semiconductor device includes a first conductivity semiconductor substrate, a first conductivity drift layer on the substrate, a second conductivity base layer on the drift layer, a first conductivity source layer on the base layer, a stripe shaped trench reaching from the surface of the source layer to the drift layer and having a gate electrode via a gate oxide film, a second conductivity layer on the bottom of the trench, and a second conductivity type region thereon on across-the-width side walls of at least one end of the trench, electrically coupling the second conductivity layer with the base layer. The device and method for manufacturing the same allow a low on-resistance without newly forming an electrode connected to the second conductivity layer even in the case of a device in which the second conductivity layer has to be grounded.

    摘要翻译： 沟槽MOS型SiC半导体器件包括第一导电半导体衬底，衬底上的第一电导率漂移层，漂移层上的第二导电性基底层，基底层上的第一导电源层， 源极层的表面到漂移层，并且通过栅极氧化膜具有栅电极，在沟槽的底部具有第二导电层，并且在其上的至少一个的宽度侧壁上的第二导电类型区域 沟槽的端部，将第二导电层与基底层电耦合。 即使在其中第二导电层必须接地的装置的情况下，其制造的装置和方法允许低导通电阻，而不会新形成连接到第二导电层的电极。