公开(公告)号：US08788870B2

公开(公告)日：2014-07-22

申请号：US13850564

申请日：2013-03-26

Applicant: STMicroelectronics, Inc.

Inventor： Alan Osamu Kobayashi

IPC: G06F1/04 ,  H04N5/44

CPC classification number: G06F1/04 ,  G09G5/006 ,  G09G2330/021 ,  G09G2370/10 ,  G09G2370/14

Abstract: Methods and systems are described for enabling display system data transmission during use. An integrated circuit package includes input interface circuitry configured to receive an audio-video data stream having a video signal and timing information and timing extraction circuitry that can identify blanking patterns for the video signal. The package includes input processing circuitry for receiving audio-video signal and converting the audio-video data stream input into a low voltage differential signal (LVDS). The package includes a timing controller having timing extraction circuitry, a set of symbol buffers, a scheduler, and timing control circuitry. All configured to implement LVDS data transfer and in some implementation enable point to point data transfer from data buffers to associated column drivers.

Abstract translation: 描述了在使用期间使显示系统数据传输的方法和系统。 集成电路封装包括输入接口电路，其被配置为接收具有视频信号和定时信息的音频 - 视频数据流以及可识别视频信号的消​​隐模式的定时提取电路。 该包装包括用于接收音频 - 视频信号并将音频 - 视频数据流输入转换成低电压差分信号（LVDS）的输入处理电路。 该封装包括具有定时提取电路，一组符号缓冲器，调度器和定时控制电路的定时控制器。 所有这些都配置为实现LVDS数据传输，并且在某些实现中，使得能够从数据缓冲区到相关列驱动器进行点对点数据传输。

公开(公告)号：US20140185510A1

公开(公告)日：2014-07-03

申请号：US14199774

申请日：2014-03-06

Applicant: STMicroelectronics, Inc.

Inventor： Liwen Chu ,  George A. Vlantis

IPC: H04W52/02

CPC classification number: H04W52/0219 ,  H04W40/005 ,  H04W52/0216 ,  H04W52/0229 ,  H04W52/0258 ,  H04W72/1263 ,  H04W84/10 ,  H04W84/12 ,  Y02D70/142

Abstract: This invention relates to switching power saving modes and rescheduling communication frames for various periods of a beacon interval (BI) defined under WGA Draft Specification 0.8 for the personal basic service set (PBSS) and infrastructure BSS to achieve further power savings and other advantages. Stations can be awake during a contention-based period (CBP) if it is in active state and can schedule frames during a service period (SP) to allow the assigned receiver to transmit to the assigned initiator. Stations in a group can schedule a group address frame to be sent during the CBP and group SP of a specific periodic BI. Stations in peer-to-peer connection may directly notify its peer stations of its power saving mode and wakeup schedule. Stations of an infrastructure basic service set (BSS) can also use the same power saving mechanism as stations of a PBSS noting a difference where each BI will be an access point's (AP's) awake BI.

Abstract translation: 本发明涉及用于个人基本服务组（PBSS）和基础设施BSS的WGA草案规范0.8中定义的信标间隔（BI）的各个周期的切换省电模式和重新调度通信帧，以实现进一步的功率节省和其他优点。 如果处于活动状态，站可以在基于争用的周期（CBP）期间唤醒，并且可以在服务周期（SP）期间调度帧以允许所分配的接收者向所分配的发起者发送。 组中的站可以安排在特定周期性BI的CBP和组SP期间发送的组地址帧。 点对点连接的站点可以直接通知其对等站其省电模式和唤醒时间表。 基础设施基础服务集（BSS）的站也可以使用与PBSS站相同的省电机制，注意到每个BI将是接入点（AP）的清醒BI。

公开(公告)号：US08759874B1

公开(公告)日：2014-06-24

申请号：US13691070

申请日：2012-11-30

Applicant: STMicroelectronics, Inc.

Inventor： Nicolas Loubet ,  Prasanna Khare

IPC: H01L31/0328 ,  H01L31/0336 ,  H01L31/072 ,  H01L31/109

CPC classification number: H01L27/088 ,  H01L29/66477 ,  H01L29/66795 ,  H01L29/785

Abstract: Despite improvements in FinFETs and strained silicon devices, transistors continue to suffer performance degradation as device dimensions shrink. These include, in particular, leakage of charge between the semiconducting channel and the substrate. An isolated channel FinFET device prevents channel-to-substrate leakage by inserting an insulating layer between the channel (fin) and the substrate. The insulating layer isolates the fin from the substrate both physically and electrically. To form the isolated FinFET device, an array of bi-layer fins can be grown epitaxially from the silicon surface, between nitride columns that provide localized insulation between adjacent fins. Then, the lower fin layer can be removed, while leaving the upper fin layer, thus yielding an interdigitated array of nitride columns and semiconducting fins suspended above the silicon surface. A resulting gap underneath the upper fin layer can then be filled in with oxide to isolate the array of fin channels from the substrate.

Abstract translation: 尽管FinFET和应变硅器件有所改进，晶体管在器件尺寸缩小的同时仍继续受到性能的降低。 这些特别包括在半导体沟道和衬底之间的电荷泄漏。 隔离沟道FinFET器件通过在沟道（鳍片）和衬底之间插入绝缘层来防止沟道对衬底的泄漏。 绝缘层物理和电气都将鳍片与衬底隔离开来。 为了形成隔离的FinFET器件，可以从硅表面，在提供相邻鳍片之间的局部绝缘的氮化物柱之间外延生长双层鳍片阵列。 然后，可以除去下部翅片层，同时留下上部翅片层，从而产生悬挂在硅表面上方的氮化物柱和半导体翅片的交错排列。 然后可以用氧化物填充在上翅片层下方的产生的间隙，以将翅片通道阵列与基底隔离。

公开(公告)号：US20140151746A1

公开(公告)日：2014-06-05

申请号：US13691070

申请日：2012-11-30

Applicant: STMICROELECTRONICS, INC.

Inventor： Nicolas Loubet ,  Prasanna Khare

IPC: H01L27/088 ,  H01L29/66

CPC classification number: H01L27/088 ,  H01L29/66477 ,  H01L29/66795 ,  H01L29/785

Abstract: Despite improvements in FinFETs and strained silicon devices, transistors continue to suffer performance degradation as device dimensions shrink. These include, in particular, leakage of charge between the semiconducting channel and the substrate. An isolated channel FinFET device prevents channel-to-substrate leakage by inserting an insulating layer between the channel (fin) and the substrate. The insulating layer isolates the fin from the substrate both physically and electrically. To form the isolated FinFET device, an array of bi-layer fins can be grown epitaxially from the silicon surface, between nitride columns that provide localized insulation between adjacent fins. Then, the lower fin layer can be removed, while leaving the upper fin layer, thus yielding an interdigitated array of nitride columns and semiconducting fins suspended above the silicon surface. A resulting gap underneath the upper fin layer can then be filled in with oxide to isolate the array of fin channels from the substrate.

Abstract translation: 尽管FinFET和应变硅器件有所改进，晶体管在器件尺寸缩小的同时仍继续受到性能的降低。 这些特别包括在半导体沟道和衬底之间的电荷泄漏。 隔离沟道FinFET器件通过在沟道（鳍片）和衬底之间插入绝缘层来防止沟道对衬底的泄漏。 绝缘层物理和电气都将鳍片与衬底隔离开来。 为了形成隔离的FinFET器件，可以从硅表面，在提供相邻鳍片之间的局部绝缘的氮化物柱之间外延生长双层鳍片阵列。 然后，可以除去下部翅片层，同时留下上部翅片层，从而产生悬挂在硅表面上方的氮化物柱和半导体翅片的交错排列。 然后可以用氧化物填充在上翅片层下方的产生的间隙，以将翅片通道阵列与基底隔离。

公开(公告)号：US20140145666A1

公开(公告)日：2014-05-29

申请号：US14063163

申请日：2013-10-25

Applicant: STMicroelectronics, Inc.

Inventor： David F. Swanson

IPC: H02P7/00

CPC classification number: H02P7/00 ,  E05B77/12 ,  E05B81/06 ,  E05B81/54 ,  E05B81/62

Abstract: An integrated circuit is configured for controlling automobile door lock motors. The circuit includes half-bridge driver circuits, with each half-bridge driver circuit having an output node configured to be coupled to a door lock motor. A control circuit is configured to control driver operation of the half-bridge driver circuits. A current regulator circuit senses current sourced by or sunk by at least one of the half-bridge circuits. The control circuit responds to the current regulator circuit and the sensed current by controlling the driver operation to provide for a regulated current to be sourced by or sunk by said half-bridge circuit. The control circuit further controls the half-bridge driver circuits to enter a tri-state mode in order to support the making of BEMF measurements on the motor.

Abstract translation: 集成电路被配置用于控制汽车门锁电机。 电路包括半桥驱动器电路，每个半桥驱动器电路具有被配置为耦合到门锁电机的输出节点。 控制电路被配置为控制半桥驱动器电路的驱动器操作。 电流调节器电路感测由至少一个半桥电路供电或沉没的电流。 控制电路通过控制驱动器操作来响应电流调节器电路和感测电流，以提供由所述半桥电路供电或沉没的稳压电流。 控制电路进一步控制半桥驱动电路进入三态模式，以支持在电动机上进行BEMF测量。

公开(公告)号：US08727504B2

公开(公告)日：2014-05-20

申请号：US13294956

申请日：2011-11-11

Applicant: Michele Palmieri

Inventor： Michele Palmieri

IPC: B41J2/015

CPC classification number: B41J2/04581 ,  B41J2/14233 ,  B41J2/161 ,  B41J2/1631 ,  B41J2/1642 ,  B41J2/1645 ,  B41J2/1646 ,  B41J2202/11

Abstract: Disclosed herein is a microfluidic jetting device having a piezoelectric member positioned above a displaceable membrane. A voltage is applied across the piezoelectric member causing deformation of the piezoelectric member. The deformation of the piezoelectric member results in a displacement of the membrane, which is formed above a cavity. Displacement of the membrane creates pressure to jet or eject liquid from the cavity and suction liquid into the cavity through ports or apertures formed in the in membrane.

Abstract translation: 本文公开了一种微流体喷射装置，其具有位于可置换膜上方的压电元件。 在压电元件两端施加电压，引起压电元件的变形。 压电元件的变形导致形成在空腔上方的膜的位移。 膜的位移产生喷射或从空腔喷出液体并将液体通过形成在膜中的端口或孔吸入空腔的压力。

公开(公告)号：US20140134808A1

公开(公告)日：2014-05-15

申请号：US14157947

申请日：2014-01-17

Applicant: International Business Machines Corporation ,  STMicroelectronics, Inc.

Inventor： John H. Zhang ,  Yiheng Xu ,  Carl Radens ,  Lawrence A. Clevenger

IPC: H01L29/66 ,  H01L21/28

CPC classification number: H01L29/66666 ,  H01L21/28008 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/165 ,  H01L29/7781

Abstract: A semiconductor device having a gate positioned in a recess between the source region and a drain region that are adjacent either side of the gate electrode. A channel region is below a majority of the source region as well as a majority of the drain region and the entire gate electrode.

Abstract translation: 一种半导体器件，其具有位于源极区域和漏极区域之间的与栅极电极的两侧相邻的凹部中的栅极。 沟道区域低于源极区域的大部分以及漏极区域和整个栅极电极的大部分。

公开(公告)号：US08716752B2

公开(公告)日：2014-05-06

申请号：US12958241

申请日：2010-12-01

Applicant: Barry Dove

Inventor： Barry Dove

IPC: H01L29/772 ,  H01L21/336

CPC classification number: H01L29/78687 ,  H01L21/823807 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/66742

Abstract: A graded SiGe sacrificial layer is epitaxially grown overlying a silicon substrate. A single crystal silicon layer is then grown by an epitaxial process overlying the graded SiGe layer. A SiGe layer is next grown by an epitaxial process as a single crystal layer overlying the silicon layer. A subsequent silicon layer, which becomes the active silicon layer for the transistors, is epitaxially grown overlying the second silicon germanium layer. Together the epitaxially grown Si, SiGe and Si layers form a laminate semiconductor structure. A MOS transistor is then formed on the active area of the single crystal silicon. The graded SiGe sacrificial layer is removed by an etch process to electrically isolate the laminate semiconductor structure from the substrate.

Abstract translation: 外延生长的梯度SiGe牺牲层覆盖在硅衬底上。 然后通过覆盖渐变SiGe层的外延工艺生长单晶硅层。 接着，通过外延工艺生长SiGe层作为覆盖硅层的单晶层。 成为晶体管的有源硅层的随后的硅层被外延生长，覆盖在第二硅锗层上。 外延生长的Si，SiGe和Si层一起形成层压半导体结构。 然后在单晶硅的有源区上形成MOS晶体管。 通过蚀刻工艺去除渐变的SiGe牺牲层以将层压半导体结构与衬底电隔离。

公开(公告)号：US08707580B2

公开(公告)日：2014-04-29

申请号：US12603249

申请日：2009-10-21

Applicant: Thomas L. Hopkins

Inventor： Thomas L. Hopkins

IPC: F26B13/10

CPC classification number: D06F58/28 ,  D06F2058/2838

Abstract: A dryer having an improved automatic dryness detection circuit is provided. Wet clothing in the dryer bin contacts a sensor and causes a pulse to be sent to a microcontroller if the resistance of the clothes is low enough. The microcontroller disregards pulses which are shorter than a threshold time and counts pulses which are longer than a threshold time. The microcontroller issues a termination signal if the rate of pulses is lower than a threshold rate.

Abstract translation: 提供一种具有改进的自动干燥检测电路的干燥机。 干燥箱中的湿衣物接触传感器，如果衣服的阻力足够低，则会将脉冲发送到微控制器。 微控制器忽略短于阈值时间的脉冲，并计数长于阈值时间的脉冲。 如果脉冲速率低于阈值速率，则微控制器发出终止信号。

公开(公告)号：US08705769B2

公开(公告)日：2014-04-22

申请号：US12561095

申请日：2009-09-16

Applicant: Earl C. Vickers

Inventor： Earl C. Vickers

IPC: H04B1/00

CPC classification number: H04H60/04 ,  H04S5/00 ,  H04S2400/05

Abstract: A frequency-domain upmix process uses vector-based signal decomposition and methods for improving the selectivity of center channel extraction. The upmix processes described do not perform an explicit primary/ambient decomposition. This reduces the complexity and improves the quality of the center channel derivation. A method of upmixing a two-channel stereo signal to a three-channel signal is described. A left input vector and a right input vector are added to arrive at a sum magnitude. Similarly, the difference between the left input vector and the right input vector is determined to arrive at a difference magnitude. The difference between the sum magnitude and the difference magnitude is scaled to compute a center channel magnitude estimate, and this estimate is used to calculate a center output vector. A left output vector and a right output vector are computed. The method is completed by outputting the left output vector, the center output vector, and the right output vector.

Abstract translation: 频域上混合过程使用基于向量的信号分解和用于提高中心信道提取的选择性的方法。 所描述的上混合处理不执行显式的主/环境分解。 这降低了复杂度，提高了中心通道的质量。 描述了将双声道立体声信号上混为三声道信号的方法。 添加左输入向量和右输入向量以得到和大小。 类似地，确定左输入向量和右输入向量之间的差以达到差值。 总和大小和差值之间的差异被缩放以计算中心声道幅度估计，并且该估计用于计算中心输出矢量。 计算左输出向量和右输出向量。 该方法通过输出左输出矢量，中心输出矢量和右输出矢量来完成。