公开(公告)号：US07293204B2

公开(公告)日：2007-11-06

申请号：US11051230

申请日：2005-02-04

Applicant: Ying-chi Lu ,  Meng-Hua Cheng ,  Chun-Yi Lee ,  Lung-Hung Yu ,  Chi-Tsung Chang ,  Chia-Hsing Lee

Inventor： Ying-chi Lu ,  Meng-Hua Cheng ,  Chun-Yi Lee ,  Lung-Hung Yu ,  Chi-Tsung Chang ,  Chia-Hsing Lee

IPC: G06F11/00 ,  G06F9/00 ,  G06F9/24 ,  G06F15/177 ,  G06F1/24 ,  G06F3/00 ,  G06F13/00 ,  G05B11/01

CPC classification number: G06F13/4226 ,  G06F11/3656

Abstract: A computer peripheral connecting interface system configuration debugging method and system is proposed, which is designed for use in conjunction with a computer platform that is equipped with a particular type of peripheral connecting interface, such as a PCI (Peripheral Component Interconnect) interface, for automatically finding errors in the PCI system configurations of a group of peripheral devices connected to the PCI peripheral connecting interface, and if errors are found, capable of automatically generating an electronic error report. This fully-automatic debugging capability can help software engineers to more conveniently and efficiently correct the errors in the PCI system configurations on a computer platform.

Abstract translation: 提出了一种计算机外设连接接口系统配置调试方法和系统，其设计用于与具有特定类型的外围连接接口（例如PCI（外围组件互连）接口）的计算机平台结合使用，用于自动 在连接到PCI外设连接接口的一组外围设备的PCI系统配置中发现错误，并且如果发现错误，则能够自动生成电子错误报告。 这种全自动调试功能可以帮助软件工程师更方便有效地纠正计算机平台上PCI系统配置中的错误。

公开(公告)号：US07279755B2

公开(公告)日：2007-10-09

申请号：US11293340

申请日：2005-12-02

Applicant: Chun-Yi Lee ,  Huai-Ying Huang ,  Chii-Ming M. Wu

Inventor： Chun-Yi Lee ,  Huai-Ying Huang ,  Chii-Ming M. Wu

IPC: H01L29/94 ,  G11C7/00

CPC classification number: H01L27/1104 ,  H01L21/7624 ,  H01L21/84 ,  H01L27/11 ,  H01L27/1203 ,  Y10S257/903

Abstract: A 6T SRAM cell includes a first inverter having a first pull-up transistor and a first pull-down transistor serially coupled between a supply source and a complementary supply source, and a second inverter cross-coupled with the first inverter having a second pull-up transistor and a second pull-down transistor serially coupled between the supply source and the complementary supply source. The cell further includes a first pass-gate and second pass-gate transistors coupled to the first and second inverters, respectively. The first pass-gate transistor and the first pull-up transistor are respectively constructed on a first P-type well and a first N-type well adjacent to one another, which are overlaid by a first doped region and a second doped region of substantially the same width in alignment with one another, respectively.

公开(公告)号：US20070132923A1

公开(公告)日：2007-06-14

申请号：US11298037

申请日：2005-12-09

Applicant: J.H. Chen ,  Hung-Yi Luo ,  Cheng-Hsin Chen ,  Chun-Yi Lee ,  Wei-Hung Chen

Inventor： J.H. Chen ,  Hung-Yi Luo ,  Cheng-Hsin Chen ,  Chun-Yi Lee ,  Wei-Hung Chen

IPC: G02F1/1335

CPC classification number: G02F1/133555 ,  G02F1/134309 ,  G02F2203/01 ,  G02F2203/02

Abstract: Systems for displaying images and methods of fabricating are provided. A representative system incorporates a transflective thin film transistor liquid crystal display (TFT-LCD) panel having a plurality of subpixels. The display panel comprises a first substrate with a transparent electrodeformed thereon, a reflective electrode on the transparent electrode, a second substrate opposite the first substrate, a liquid crystal layer between the first substrate and the second substrate. The panel also exhibits at least one of: the reflective electrode and the transparent electrode overlap by substantially between 100 and 1000 square micrometers; the reflective electrode and the transparent electrode overlap such that a ratio of an area of overlap of the reflective electrode and the transparent electrode to an area of a corresponding subpixel is substantially between 0.05 and 0.12; and a ratio of an area of the transparent electrode to an area of a corresponding subpixel is substantially between 0.5 and 0.6.

Abstract translation: 提供了显示图像和制造方法的系统。 代表性系统包括具有多个子像素的透反射薄膜晶体管液晶显示器（TFT-LCD）面板。 显示面板包括形成有透明电极的第一基板，透明电极上的反射电极，与第一基板相对的第二基板，在第一基板和第二基板之间的液晶层。 面板还具有以下至少之一：反射电极和透明电极重叠大致在100和1000平方微米之间; 反射电极和透明电极重叠，使得反射电极和透明电极的重叠面积与相应子像素的面积的比率基本上在0.05和0.12之间; 并且透明电极的面积与对应子像素的面积的比例基本上在0.5和0.6之间。

公开(公告)号：US07152013B2

公开(公告)日：2006-12-19

申请号：US11053571

申请日：2005-02-07

Applicant: Chi-Tsung Chang ,  Ying-Chih Lu ,  Meng-Hua Cheng ,  Chun-Yi Lee ,  Ling-Hung Yu ,  Chia-Hsing Lee

Inventor： Chi-Tsung Chang ,  Ying-Chih Lu ,  Meng-Hua Cheng ,  Chun-Yi Lee ,  Ling-Hung Yu ,  Chia-Hsing Lee

IPC: G01K1/08 ,  G01K13/00 ,  G06F15/00 ,  G06F1/20 ,  G05D23/00

CPC classification number: G05D23/1917

Abstract: A heat dissipating method is applied to a computer system having a timing signaling mechanism and a temperature sensing unit. Firstly, a process of setting a dissipating temperature operating mode is performed. Then, a periodic signal is regularly transmitted to a basic input output system by the timing signaling mechanism of the computer system, and a temperature of each of hardware devices is regularly sensed by the temperature sensing unit. Subsequently, a heat dissipating unit of each of the hardware devices is actuated to perform a heat dissipation process according to the temperature sensed by the temperature sensing unit and the dissipating temperature operating mode. Therefore, the present invention can control operating intensity of the heat dissipating units and achieve hardware monitoring without requiring additional software or hardware, such that heat dissipating and operation efficiencies of the hardware devices of the computer system can be improved.

公开(公告)号：US20060206764A1

公开(公告)日：2006-09-14

申请号：US11080865

申请日：2005-03-11

Applicant: Ying-Chih Lu ,  Meng-Hua Cheng ,  Chun-Yi Lee ,  Chia-Hsing Lee ,  Chi-Tsung Chang ,  Ling-Hung Yu

Inventor： Ying-Chih Lu ,  Meng-Hua Cheng ,  Chun-Yi Lee ,  Chia-Hsing Lee ,  Chi-Tsung Chang ,  Ling-Hung Yu

IPC: G06F11/00

CPC classification number: G11C29/26 ,  G11C5/04 ,  G11C2029/0407

Abstract: A memory reliability detection system and a memory reliability detection method are applied in a computer device to perform a detection process on a motherboard according to a basic input/output system (BIOS) program during power-on of the computer device, so as to allow the computer device to successfully enter an operating system and steadily operate as well as perform an initialization procedure according to the BIOS program. The computer device is allowed to read a parameter of a dual in-line memory module (DIMM) on the motherboard to perform the detection process. If a detection result does not satisfy a predetermined requirement, the DIMM is problematic and recorded in a storage unit, such that the computer device can identify and ignore the problematic DIMM according to the record after power-on, thereby preventing an influence on operation stability of the computer device due to reading the problematic DIMM during operation.

Abstract translation: 在计算机装置中应用存储器可靠性检测系统和存储器可靠性检测方法，以在计算机装置通电期间根据基本输入/输出系统（BIOS）程序在母板上执行检测处理，以允许 计算机设备成功进入操作系统并稳定运行，并根据BIOS程序执行初始化过程。 允许计算机设备读取主板上的双列直插式存储器模块（DIMM）的参数，以执行检测过程。 如果检测结果不满足规定的要求，则DIMM存在问题并记录在存储单元中，使得计算机装置可根据上电后的记录识别并忽略有问题的DIMM，从而防止对操作稳定性的影响 由于在操作期间读取有问题的DIMM，计算机设备。