PROGRAMMABLE LOGIC CONTROLLER HAVING MICRO-ELECTROMECHANICAL SYSTEM BASED SWITCHING
    72.
    发明申请
    PROGRAMMABLE LOGIC CONTROLLER HAVING MICRO-ELECTROMECHANICAL SYSTEM BASED SWITCHING 有权
    具有微机电系统开关的可编程逻辑控制器

    公开(公告)号:US20090125124A1

    公开(公告)日:2009-05-14

    申请号:US11939729

    申请日:2007-11-14

    CPC classification number: G05B19/054 H01H9/542 H01H59/0009

    Abstract: A programmable logic controller is disclosed. The programmable logic controller includes control circuitry integrally arranged with a current path and at least one micro electromechanical system (MEMS) switch disposed in the current path. The programmable logic controller further includes a hybrid arcless limiting technology (HALT) circuit connected in parallel with the at least one MEMS switch facilitating the opening of the at least one MEMS switch. The programmable logic controller also may include a MEMS switch and a voltage sensor for measuring the voltage across the MEMS switch. The MEMS switches are arranged to transmit or receive logic signals.

    Abstract translation: 公开了一种可编程逻辑控制器。 可编程逻辑控制器包括与电流路径整体布置的控制电路和设置在电流路径中的至少一个微机电系统(MEMS)开关。 可编程逻辑控制器还包括与至少一个MEMS开关并联连接的混合无弧限制技术(HALT)电路,促进至少一个MEMS开关的打开。 可编程逻辑控制器还可以包括用于测量MEMS开关两端的电压的MEMS开关和电压传感器。 MEMS开关被布置为发送或接收逻辑信号。

    MICROELECTROMECHANICAL SYSTEM PRESSURE SENSOR AND METHOD FOR MAKING AND USING

    公开(公告)号:US20070138584A1

    公开(公告)日:2007-06-21

    申请号:US11677624

    申请日:2007-02-22

    CPC classification number: G01L9/0073 G01L1/148

    Abstract: According to some embodiments, a conducting layer is formed on a first wafer. An insulating layer is formed on a second wafer. The insulating layer includes a cavity and a conducting area may be formed in the second wafer proximate to the cavity. The side of the conducting layer opposite the first wafer is bonded to the side of the insulating layer opposite the second wafer. At least some of the first wafer is then removed, without removing at least some of the conducting layer, to form a conducting diaphragm that is substantially parallel to the second wafer. In this way, an amount of capacitance between the diaphragm and the conducting area may be measured to determine an amount of pressure being applied to the diaphragm.

    Three dimensional high aspect ratio micromachining

    公开(公告)号:US20060157807A1

    公开(公告)日:2006-07-20

    申请号:US11375860

    申请日:2006-03-15

    CPC classification number: B81C1/00626 B81B2201/033 H01L21/3086

    Abstract: Multi-level structures are formed in a semiconductor substrate by first forming a pattern of lines or structures of different widths. Width information on the pattern is decoded by processing steps into level information to form a MEMS structure. The pattern is etched to form structures having a first floor. The structures are oxidized until structures of thinner width are substantially fully oxidized. A portion of the oxide is then etched to expose the first floor. The first floor is then etched to form a second floor. The oxide is then optionally removed, leaving a multi-level structure. In one embodiment, high aspect ratio comb actuators are formed using the multi-level structure process.

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