中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

111 records (took 0.021 seconds)

    SHIFT REGISTER UNIT, DRIVING METHOD THEREOF, GATE DRIVER CIRCUIT AND DISPLAY DEVICE
    71.
    发明申请
    SHIFT REGISTER UNIT, DRIVING METHOD THEREOF, GATE DRIVER CIRCUIT AND DISPLAY DEVICE 审中-公开

    公开(公告)号：US20180294040A1

    公开(公告)日：2018-10-11

    申请号：US15533042

    申请日：2016-11-04

    Applicant: BOE TECHNOLOGY GROUP CO., LTD.

    Inventor： Xueguang HAO ,  Jianbo XIAN ,  Xinyin WU

    IPC: G11C19/28 ,  G09G3/20

    CPC classification number: G11C19/28 ,  G09G3/3266 ,  G09G3/3677 ,  G09G2310/0286 ,  G09G2320/0252 ,  G11C19/184 ,  G11C19/287

    Abstract: A shift register unit, a driving method thereof, a gate driver circuit and a display device are provided. The shift register unit includes a first pull-up node control unit, a second pull-up node control unit configured to enable a pull-up node to be at a first level at a pull-down maintenance stage under the control of a first clock signal, a first pull-down node control unit configured to enable a pull-down node to be at a second level at the pull-down maintenance stage under the control of the first clock signal, a second pull-down node control unit, a gate driving signal output unit configured to output a gate driving signal under the control of the pull-up and pull-down nodes, and a carry signal output unit configured to enable a carry signal output end to output a carry signal under the control of the pull-up and pull-down nodes.

    DISPLAY PANEL AND DISPLAY DEVICE
    72.
    发明申请
    DISPLAY PANEL AND DISPLAY DEVICE 审中-公开

    公开(公告)号：US20180226429A1

    公开(公告)日：2018-08-09

    申请号：US15325555

    申请日：2016-02-16

    Applicant: BOE TECHNOLOGY GROUP CO., LTD.

    Inventor： Yongda MA ,  Xinyin WU ,  Jianbo XIAN

    IPC: H01L27/12

    CPC classification number: H01L27/124 ,  G02F1/133512 ,  H01L27/1248

    Abstract: Disclosed are a display panel and a display device. The display panel includes: a first substrate and a second substrate disposed as opposed to each other. The first substrate includes gate lines (1) and data lines (2), and pixel units (6) defined by the gate lines (1) and the data lines (2). The second substrate includes a black matrix (4), the black matrix (4) having a plurality of apertures (7) configured as corresponding to the pixel units (6). A orthographic projection of at least one side of at least a part of the plurality of apertures in a plane of the first substrate is at least partially located outside the pixel units (6).

    WIRE FIXATION APPARATUS AND DISPLAY DEVICE
    74.
    发明申请
    WIRE FIXATION APPARATUS AND DISPLAY DEVICE 审中-公开

    公开(公告)号：US20180035073A1

    公开(公告)日：2018-02-01

    申请号：US15662828

    申请日：2017-07-28

    Applicant: BOE TECHNOLOGY GROUP CO., LTD.

    Inventor： Yongda MA ,  Jianbo XIAN ,  Yong QIAO ,  Yuxin ZHANG

    IPC: H04N5/64

    CPC classification number: H04N5/64 ,  G02F1/1333 ,  G06F1/1601

    Abstract: A wire fixation apparatus and a display device are provided. The wire fixation apparatus includes: a first snap structure, half surrounding a wire and provided with a first opening at a side thereof; a second snap structure, half surrounding a wire and provided with a second opening at a side thereof; and an auxiliary installation plate connecting the first snap structure to the second snap structure. The first opening of the first snap structure is opposite to the second opening of the second snap structure. The first snap structure, the second snap structure and the auxiliary installation plate together form a wire channel for the wire to pass therethrough, and an interval is arranged between the first snap structure and the second snap structure to enable the wire to be snapped into the wire channel through the interval. Projections of the first snap structure, the second snap structure and the auxiliary installation plate onto a first projection plane together encircle a projection of the wire onto the first projection plane. The first projection plane is a plane of a cross section of the wire.

    ARRAY SUBSTRATE, DISPLAY PANEL AND DISPLAY APPARATUS
    77.
    发明申请
    ARRAY SUBSTRATE, DISPLAY PANEL AND DISPLAY APPARATUS 有权
    阵列基板，显示面板和显示设备

    公开(公告)号：US20160266431A1

    公开(公告)日：2016-09-15

    申请号：US14769303

    申请日：2015-04-10

    Applicant: BOE Technology Group Co., Ltd.

    Inventor： Wenbo LI ,  Pan LI ,  Jianbo XIAN ,  Hongfei CHENG

    IPC: G02F1/1339 ,  H01L21/285 ,  G02F1/1368 ,  H01L29/51 ,  H01L29/49 ,  G02F1/1362 ,  H01L27/12 ,  H01L21/02

    CPC classification number: G02F1/13394 ,  G02F1/136227 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/134345 ,  H01L21/0217 ,  H01L21/02274 ,  H01L21/02532 ,  H01L21/02565 ,  H01L21/02592 ,  H01L21/0262 ,  H01L21/02631 ,  H01L21/2855 ,  H01L27/1222 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1259 ,  H01L29/4908 ,  H01L29/4966 ,  H01L29/518

    Abstract: An array substrate, a display panel and a display apparatus are disclosed. The array substrate includes a plurality of gate lines (10; 50) and a plurality of data lines (30; 51), and pixel units arranged in an array. Each of the pixel units includes one pixel electrode (41; 42) and one thin film transistor, the data line (30; 51) serve as a source electrode (31; 311) of the thin film transistor, the gate line (10; 50) serve as a gate electrode (11) of the thin film transistor, and a drain electrode (32; 321; 322) of the thin film transistor is electrically connected to the pixel electrode (41; 42), at least one of the gate lines (10; 50) and the data lines (30; 51) has a recess (363; 364) provided thereon aligned with a spacer for fixing. With the recess (363; 364), the post spacer is prevented from moving to affect the display region when the substrate is bent and deformed under an external pressure.

    Abstract translation: 公开了阵列基板，显示面板和显示装置。 阵列基板包括多条栅线（10; 50）和多条数据线（30; 51），以及排列成阵列的像素单元。 每个像素单元包括一个像素电极（41; 42）和一个薄膜晶体管，数据线（30; 51）用作薄膜晶体管的源电极（31; 311），栅极线（10; 50）用作薄膜晶体管的栅电极（11），并且薄膜晶体管的漏电极（32; 321; 322）电连接到像素电极（41; 42），至少一个 栅线（10; 50）和数据线（30; 51）具有设置在其上的用于固定的间隔件的凹槽（363; 364）。 利用凹部（363,364），当外部压力下基板弯曲和变形时，防止支柱间隔件移动以影响显示区域。

    SUBSTRATE AND DISPLAY DEVICE
    78.
    发明申请
    SUBSTRATE AND DISPLAY DEVICE 审中-公开
    基板和显示装置

    公开(公告)号：US20160252786A1

    公开(公告)日：2016-09-01

    申请号：US14769690

    申请日：2014-12-04

    Applicant: BOE Technology Group Co., Ltd.

    Inventor： Jianbo XIAN ,  Yong QIAO ,  Hongfei CHENG ,  Wenbo LI ,  Pan LI

    IPC: G02F1/1343 ,  G02F1/1362

    CPC classification number: G02F1/134336 ,  G02F1/136286 ,  G02F2001/134318 ,  G02F2201/121

    Abstract: A substrate and a display device are disclosed. The substrate includes a plurality of common electrode lines that are spaced at an interval, configured for providing corresponding pixel units with a common voltage; at least two connecting lines, each of which is located in a display region, and which are configured for achieving mutual electrical connection between at least two of the common electrode lines that are adjacent.

    Abstract translation: 公开了一种基板和显示装置。 衬底包括以间隔隔开的多个公共电极线，其被配置为为相应的像素单元提供公共电压; 至少两个连接线，每个连接线位于显示区域中，并且被配置为实现至少两个相邻的公共电极线之间的相互电连接。

    ARRAY SUBSTRATE, MANUFACTURING METHOD THEREOF AND DISPLAY DEVICE
    80.
    发明申请
    ARRAY SUBSTRATE, MANUFACTURING METHOD THEREOF AND DISPLAY DEVICE 有权
    阵列基板，其制造方法和显示装置

    公开(公告)号：US20160197098A1

    公开(公告)日：2016-07-07

    申请号：US14891086

    申请日：2015-04-20

    Applicant: BOE TECHNOLOGY GROUP CO., LTD.

    Inventor： Jianbo XIAN ,  Hongfei CHENG ,  Wenbo LI ,  Yong QIAO ,  Pan LI

    IPC: H01L27/12

    CPC classification number: H01L27/124 ,  G02F1/136286 ,  G02F2001/136218 ,  H01L27/1222 ,  H01L27/1248 ,  H01L27/1259

    Abstract: An array substrate, a manufacturing method thereof and a display device are provided. The array substrate comprises a plurality of gate lines (102) and a plurality of data lines (101); a region defined by adjacent data lines (101) and adjacent gate lines (102) is a pixel unit; the pixel unit includes a common electrode line (103), a pixel electrode (104), a thin film transistor (105) and an auxiliary electrode (202); a first end of the auxiliary electrode (202) is electrically connected with a drain electrode (203) of the thin film transistor (105); and a second end of the auxiliary electrode (202) is electrically connected with the pixel electrode (104). The array substrate is used for enhancing an electric field within the peripheral range of the pixel electrode (104) of the pixel unit and avoiding the phenomenon of light leakage at an edge of the pixel unit.

    Abstract translation: 提供阵列基板，其制造方法和显示装置。 阵列基板包括多条栅线（102）和多条数据线（101）; 由相邻数据线（101）和相邻的栅极线（102）限定的区域是像素单元; 像素单元包括公共电极线（103），像素电极（104），薄膜晶体管（105）和辅助电极（202）。 辅助电极（202）的第一端与薄膜晶体管（105）的漏电极（203）电连接。 并且辅助电极（202）的第二端与像素电极（104）电连接。 阵列基板用于增强像素单元的像素电极（104）的周边范围内的电场，并且避免像素单元的边缘处的光泄漏现象。

Patent Agency Ranking