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    System and method for virtualized receive descriptors
    72.
    发明授权
    System and method for virtualized receive descriptors 审中-公开

    公开(公告)号：US10673750B2

    公开(公告)日：2020-06-02

    申请号：US16274802

    申请日：2019-02-13

    Applicant: Intel Corporation

    Inventor： Ronen Chayat ,  Andrey Chilikin ,  John J. Browne

    IPC: H04L12/721

    Abstract: There is disclosed in one example a computing apparatus, including: a hardware platform including at least a processor; and one or more memories having encoded thereon instructions to instruct the hardware platform to: receive a request to generate a receive descriptor profile (RDP) for the requestor's network flow; receive at least one parameter for the RDP; generate the RDP from the at least one parameter; and send the RDP to a network interface controller for the requestor.

    Profiles for collecting telemetry data
    74.
    发明授权
    Profiles for collecting telemetry data 有权

    公开(公告)号：US10433035B2

    公开(公告)日：2019-10-01

    申请号：US15476077

    申请日：2017-03-31

    Applicant: Intel Corporation

    Inventor： Ronen Chayat ,  Andrey Chilikin ,  John J. Browne ,  Chris MacNamara ,  Tomasz Kantecki

    IPC: H04Q9/02

    Abstract: An apparatus includes telemetry registers, a memory, and a virtualized telemetry controller. The memory may store a set of telemetry profiles, including a first telemetry profile specifying a collection trigger, a set of telemetry registers, and a telemetry data destination. The virtualized telemetry controller may be to: detect a condition satisfying the collection trigger specified in the first telemetry profile; in response to a detection of the condition, read telemetry values from the set of telemetry registers specified in the first telemetry profile; generate a telemetry container including the telemetry values; and send the telemetry container to the telemetry data destination specified in the first telemetry profile.

    Apparatus for interconnecting circuitry
    75.
    发明授权
    Apparatus for interconnecting circuitry 有权

    公开(公告)号：US10212827B2

    公开(公告)日：2019-02-19

    申请号：US15201323

    申请日：2016-07-01

    Applicant: Intel Corporation

    Inventor： John J. Browne ,  Andrew Maclean ,  Shawna M. Liff

    IPC: H05K3/34 ,  H05K1/02 ,  G06F13/00 ,  H05K1/14

    Abstract: Techniques and mechanisms for controlling configurable circuitry including an antifuse. In an embodiment, the antifuse is disposed in or on a substrate, the antifuse configured to form a solder joint to facilitate interconnection of circuit components. Control circuitry to operate with the antifuse is disposed in, or at a side of, the same substrate. The antifuse is activated based on a voltage provided at an input node, where the control circuitry automatically transitions through a pre-determined sequence of states in response to the voltage. The pre-determined sequence of states coordinates activation of one or more fuses and switched coupling one or more circuit components to the antifuse. In another embodiment, multiple antifuses, variously disposed in or on the substrate, are configured each to be activated based on the voltage provided at an input node.

    TECHNOLOGIES FOR BUFFERING RECEIVED NETWORK PACKET DATA
    76.
    发明申请
    TECHNOLOGIES FOR BUFFERING RECEIVED NETWORK PACKET DATA 审中-公开

    公开(公告)号：US20190044893A1

    公开(公告)日：2019-02-07

    申请号：US16024774

    申请日：2018-06-30

    Applicant: Intel Corporation

    Inventor： Bruce Richardson ,  Chris MacNamara ,  Patrick Fleming ,  Tomasz Kantecki ,  Ciara Loftus ,  John J. Browne ,  Patrick Connor

    IPC: H04L12/861 ,  H04L12/879

    Abstract: Technologies for buffering received network packet data include a compute device with a network interface controller (NIC) configured to determine a packet size of a network packet received by the NIC and identify a preferred buffer size between a small buffer and a large buffer. The NIC is further configured to select, from the descriptor, a buffer pointer based on the preferred buffer size, wherein the buffer pointer comprises one of a small buffer pointer corresponding to a first physical address in memory allocated to the small buffer or a large buffer pointer corresponding to a second physical address in memory allocated to the large buffer. Additionally, the NIC is configured to store at least a portion of the network packet in the memory based on the selected buffer pointer. Other embodiments are described herein.

    MEMORY RING-BASED JOB DISTRIBUTION FOR PROCESSOR CORES AND CO-PROCESSORS
    77.
    发明申请
    MEMORY RING-BASED JOB DISTRIBUTION FOR PROCESSOR CORES AND CO-PROCESSORS 审中-公开

    公开(公告)号：US20180285154A1

    公开(公告)日：2018-10-04

    申请号：US15473885

    申请日：2017-03-30

    Applicant: Intel Corporation

    Inventor： John J. Browne ,  Chris MacNamara ,  Tomasz Kantecki ,  Stephen Doyle ,  Sean Harte ,  Niall Power

    IPC: G06F9/48 ,  G06F9/50

    Abstract: An apparatus includes a processor, a co-processor and a memory ring. The memory ring includes a plurality of slots that are associated with a plurality of jobs. The processor is to apply a set of rules and based on the application of the set of rules, selectively access a first slot of the plurality of slots to read first data stored in the first slot representing a first job of the plurality of jobs and process the first job based on the first data. The co-processor is to apply the set of rules and based on the application of the set of rules, access a second slot of the plurality of slots other than the first slot to read second data representing a second job of the plurality of jobs and process the second job based on the second data.

    Intelligent resource selection for received content
    80.
    发明授权
    Intelligent resource selection for received content 有权

    公开(公告)号：US12160368B2

    公开(公告)日：2024-12-03

    申请号：US16859792

    申请日：2020-04-27

    Applicant: Intel Corporation

    Inventor： Francesc Guim Bernat ,  Patrick Connor ,  Patrick G. Kutch ,  John J. Browne ,  Alexander Bachmutsky

    IPC: H04L47/78 ,  H04L41/08 ,  H04L41/0816 ,  H04L43/0852 ,  H04L43/0888 ,  H04L47/72

    Abstract: Examples described herein relate to a device configured to allocate memory resources for packets received by the network interface based on received configuration settings. In some examples, the device is a network interface. Received configuration settings can include one or more of: latency, memory bandwidth, timing of when the content is expected to be accessed, or encryption parameters. In some examples, memory resources include one or more of: a cache, a volatile memory device, a storage device, or persistent memory. In some examples, based on a configuration settings not being available, the network interface is to perform one or more of: dropping a received packet, store the received packet in a buffer that does not meet the configuration settings, or indicate an error. In some examples, configuration settings are conditional where the settings are applied if one or more conditions is met.

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