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公开(公告)号：US12072760B2
公开(公告)日：2024-08-27
申请号：US17133305
申请日：2020-12-23
Applicant: Intel Corporation
Inventor： Andrew Cunningham , Patrick Fleming , Naveen Lakkakula , Richard Guerin , Charitra Sankar , Stephen Doyle , Ralph Castro , John Browne
CPC classification number: G06F11/1004 , G06F9/3005 , G06F9/4494 , G06F9/4881
Abstract: Methods, apparatus, systems and articles of manufacture are disclosed to control execution of tasks in a computing system. The methods, apparatus, systems and articles of manufacture include at least one storage device and at least one processor to, execute instructions to at least obtain a request to perform an inverse operation on a data flow, the data flow previously transformed during a forward operation, determine a first processor core that executed the forward operation, the data flow including an identifier of the first processor core, and transmit the data flow to a second processor core to perform the inverse operation.
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公开(公告)号：US20240195789A1
公开(公告)日：2024-06-13
申请号：US18442457
申请日：2024-02-15
Applicant: Intel Corporation
Inventor： Kshitij Arun Doshi , Uzair Qureshi , Lokpraveen Mosur , Patrick Fleming , Stephen Doyle , Brian Andrew Keating , Ned M. Smith
CPC classification number: H04L63/0435 , G06F13/28 , G06F21/602 , H04L63/166
Abstract: A computing device includes a direct memory access (DMA) engine coupled to a memory, a network interface, and processing circuitry. The processing circuitry is to perform a secure exchange with a second computing device to negotiate a shared encryption key, based on a request for data received via the network interface from the second computing device. The DMA engine is to retrieve the data from a storage location based on an encryption command. The encryption command indicates the storage location. The DMA engine is to encrypt the data based on the shared encryption key to generate encrypted data, and store the encrypted data in the memory.
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公开(公告)号：US12010019B2
公开(公告)日：2024-06-11
申请号：US17648196
申请日：2022-01-18
Applicant: Intel Corporation
Inventor： Eliel Louzoun , Manasi Deval , Stephen Doyle , Noam Elati , Patrick Fleming , Gregory Bowers
CPC classification number: H04L45/74 , H04L47/365 , H04L49/90
Abstract: An apparatus, a method, and a computer program for generating data packets according to a transport protocol from an application buffer comprising a plurality of data streams is provided. The apparatus comprises an input circuit configured to receive metadata comprising at least one of information about data packet types supported by the transport protocol, information about an offset and a length of the supported data packet types, and information about possible stream header start positions, possible payload start positions and possible offsets in the data streams. Further, the apparatus comprises a parsing circuit configured to identify offsets in an application buffer as possible segmentation points based on the metadata, to segment the application buffer at the possible segmentation points into segments for data packets, and to generate data packets according to the transport protocol based on the segments. Furthermore, an apparatus, a method and a computer program for processing the application buffer is provided.
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4.发明授权公开(公告)号：US11855897B2
公开(公告)日：2023-12-26
申请号：US17356420
申请日：2021-06-23
Applicant: Intel Corporation
Inventor： Patrick Connor , Andrey Chilikin , Brendan Ryan , Chris MacNamara , John J. Browne , Krishnamurthy Jambur Sathyanarayana , Stephen Doyle , Tomasz Kantecki , Anthony Kelly , Ciara Loftus , Fiona Trahe
IPC: H04W56/00 , H04L47/125 , G06F9/455 , H04L47/2441 , H04L43/0817 , G06F8/76
CPC classification number: H04L47/125 , G06F8/76 , G06F9/455 , H04L43/0817 , H04L47/2441
Abstract: A computing device includes an appliance status table to store at least one of reliability and performance data for one or more network functions virtualization (NFV) appliances and one or more legacy network appliances. The computing device includes a load controller to configure an Internet Protocol (IP) filter rule to select a packet for which processing of the packet is to be migrated from a selected one of the one or more legacy network appliances to a selected one of the one or more NFV appliances, and to update the appliance status table with received at least one of reliability and performance data for the one or more legacy network appliances and the one or more NFV appliances. The computing device includes a packet distributor to receive the packet, to select one of the one or more NFV appliances based at least in part on the appliance status table, and to send the packet to the selected NFV appliance. Other embodiments are described herein.
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公开(公告)号：US11271856B2
公开(公告)日：2022-03-08
申请号：US16414814
申请日：2019-05-17
Applicant: Intel Corporation
Inventor： Eliel Louzoun , Manasi Deval , Stephen Doyle , Noam Elati , Patrick Fleming , Gregory Bowers
IPC: H04L12/741 , H04L45/74 , H04L49/90 , H04L47/36
Abstract: An apparatus, a method and a computer program for generating data packets according to a transport protocol from an application buffer comprising a plurality of data streams is provided. The apparatus comprises an input circuit configured to receive metadata comprising at least one of information about data packet types supported by the transport protocol, information about an offset and a length of the supported data packet types, and information about possible stream header start positions, possible payload start positions and possible offsets in the data streams. Further, the apparatus comprises a parsing circuit configured to identify offsets in an application buffer as possible segmentation points based on the metadata, to segment the application buffer at the possible segmentation points into segments for data packets, and to generate data packets according to the transport protocol based on the segments. Furthermore, an apparatus, a method and a computer program for processing the application buffer is provided.
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Patent Agency Ranking
公开(公告)号：US11050682B2
公开(公告)日：2021-06-29
申请号：US15719081
申请日：2017-09-28
Applicant: Intel Corporation
Inventor： Tomasz Kantecki , Niall Power , John J. Browne , Christopher MacNamara , Stephen Doyle
IPC: H04L12/861 , H04L12/883 , H04L12/801 , H04L12/935
Abstract: A network interface device, including: an ingress interface; a host platform interface to communicatively couple to a host platform; and a packet preprocessor including logic to: receive via the ingress interface a data sequence including a plurality of discrete data units; identify the data sequence as data for a parallel processing operation; reorder the discrete data units into a reordered data frame, the reordered data frame configured to order the discrete data units for consumption by the parallel operation; and send the reordered data to the host platform via the host platform interface.
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公开(公告)号：US11943207B2
公开(公告)日：2024-03-26
申请号：US17032391
申请日：2020-09-25
Applicant: Intel Corporation
Inventor： Kshitij Arun Doshi , Uzair Qureshi , Lokpraveen Mosur , Patrick Fleming , Stephen Doyle , Brian Andrew Keating , Ned M. Smith
CPC classification number: H04L63/0435 , G06F13/28 , G06F21/602 , H04L63/166
Abstract: Methods, systems, and use cases for one-touch inline cryptographic data security are discussed, including an edge computing device with a network communications circuitry (NCC), an enhanced DMA engine coupled to a memory device and including a cryptographic engine, and processing circuitry configured to perform a secure exchange with a second edge computing device to negotiate a shared symmetric encryption key, based on a request for data. An inline encryption command for communication to the enhanced DMA engine is generated. The inline encryption command includes a first address associated with a storage location storing the data, a second address associated with a memory location in the memory device, and the shared symmetric encryption key. The data is retrieved from the storage location using the first address, the data is encrypted using the shared symmetric encryption key, and the encrypted data is stored in the memory location using the second address.
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公开(公告)号：US11909642B2
公开(公告)日：2024-02-20
申请号：US17011964
申请日：2020-09-03
Applicant: Intel Corporation
Inventor： Bo Cui , Stephen Doyle
IPC: H04L47/12 , H04L9/40 , H04L69/22 , H04L1/1812
CPC classification number: H04L47/12 , H04L1/1812 , H04L63/0428 , H04L69/22
Abstract: Examples described herein relate to a network device apparatus that includes a network interface card to process a received packet. In some examples, based on the received packet only including one or more frames for which acknowledgement of receipt is offloaded to the network interface card, generate an acknowledgement (ACK) message to acknowledge receipt of the received packet. In some examples, a frame for which acknowledgement of receipt is offloaded to the network interface card comprises a STREAM frame compatible with quick User Datagram Protocol (UDP) Internet Connections (QUIC). In some examples, a computing platform is coupled to the network interface card. In some examples, based on the received packet only including any frame for which acknowledgement of receipt is not offloaded to the network interface, the computing platform is to generate an ACK message for the received packet.
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公开(公告)号：US20190356589A1
公开(公告)日：2019-11-21
申请号：US16414814
申请日：2019-05-17
Applicant: Intel Corporation
Inventor： Eliel Louzoun , Manasi Deval , Stephen Doyle , Noam Elati , Patrick Fleming , Gregory Bowers
IPC: H04L12/741 , H04L12/861
Abstract: An apparatus, a method and a computer program for generating data packets according to a transport protocol from an application buffer comprising a plurality of data streams is provided. The apparatus comprises an input circuit configured to receive metadata comprising at least one of information about data packet types supported by the transport protocol, information about an offset and a length of the supported data packet types, and information about possible stream header start positions, possible payload start positions and possible offsets in the data streams. Further, the apparatus comprises a parsing circuit configured to identify offsets in an application buffer as possible segmentation points based on the metadata, to segment the application buffer at the possible segmentation points into segments for data packets, and to generate data packets according to the transport protocol based on the segments. Furthermore, an apparatus, a method and a computer program for processing the application buffer is provided.
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公开(公告)号：US20190097951A1
公开(公告)日：2019-03-28
申请号：US15719081
申请日：2017-09-28
Applicant: Intel Corporation
Inventor： Tomasz Kantecki , Niall Power , John J. Browne , Christopher MacNamara , Stephen Doyle
IPC: H04L12/861 , H04L12/883
Abstract: A network interface device, including: an ingress interface; a host platform interface to communicatively couple to a host platform; and a packet preprocessor including logic to: receive via the ingress interface a data sequence including a plurality of discrete data units; identify the data sequence as data for a parallel processing operation; reorder the discrete data units into a reordered data frame, the reordered data frame configured to order the discrete data units for consumption by the parallel operation; and send the reordered data to the host platform via the host platform interface.
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