摘要:
Systems and methods for efficiently switching context between processing elements are disclosed. These systems and methods may transfer the context of a processing element to a storage location. Using the DMA controller of a target processing element, the contents of this storage location may be transferred to another storage location associated with the target processing element. The context may then be restored from this storage location to the proper locations in the target processing element, and the target processing element may then begin processing utilizing this transferred context.
摘要:
A computer implemented method, data processing system, and computer usable code are provided for optimizing thermal performance of a computer system. A set of system resources associated with the computer system are identified. A thermal index is requested for each of the set of system resources to form a set of thermal indexes. A thermal constraint is loaded and software is compiled using the set of thermal indexes in order not to exceed the thermal constraint.
摘要:
A method, system, apparatus, and article of manufacture for performing cacheline polling utilizing store and reserve and load when reservation lost instructions is disclosed. In one embodiment a method is provided which comprises storing a buffer flag busy indicator data value within a first cacheable memory location and setting a load/store operation reservation on said first cacheable memory location via a store and reserve instruction. In the described embodiment, a data value stored within the first cacheable memory location is accessed via a conditional load instruction in response to a determination that the load/store operation reservation on the first cacheable memory location has been reset. Conversely, execution of the conditional load instruction is stalled in response to a determination that the load/store operation reservation on the first cacheable memory location has not been reset.
摘要:
A load when reservation lost instruction for performing cacheline polling is disclosed. Initially, a first process requests an action to be performed by a second process. The request is made via a store operation to a cacheable memory location. The first process then reads the cacheable memory location via a conditional load operation to determine whether or not the requested action has been completed by the second process, and the first process sets a reservation at the cacheable memory location if the requested action has not been completed by the second process. The conditional load operation of the first process is stalled until the reservation at the cacheable memory location has been lost. After the requested action has been completed, the reservation in the cacheable memory location is reset by the second process.
摘要:
A method and apparatus for the prevention of unwanted access to secure areas of memory during the POR or boot sequence of a CPU. Via control within the CPU, commands that are sent to and received by the CPU prior to the finish of the POR sequence can be denied I/O address translation, thus protecting memory during the POR sequence. Furthermore, an error response can be generated in the CPU and sent back to the I/O device which issued the command.
摘要:
An I/O address translation apparatus and method for specifying relaxed ordering for I/O accesses are provided. With the apparatus and method, storage ordering (SO) bits are provided in an I/O address translation data structure, such as a page table or segment table. These SO bits define the order in which reads and/or writes initiated by an I/O device may be performed. These SO bits are combined with an ordering bit, e.g., the Relaxed Ordering Attribute bit of PCI Express, on the I/O interface. The weaker ordering indicated either in the I/O address translation data structure or in the I/O interface relaxed ordering bit is used to control the order in which I/O operations may be performed.
摘要:
A computer implemented method, data processing system, and computer usable code are provided the generation of software thermal profiles for applications executed on a set of processors in a simulated environment. Execution of a software program being run on a software simulator is detected and hardware operations for the software program being executed by the set of processors are analyzed to create analyzed information. Then, a thermal index is generated based on the analyzed information.
摘要:
A computer implemented method, data processing system, and computer usable code are provided for analytical generation of software thermal profiles. In order to generate a thermal profile, a set of instruction streams are analyzed for a program being executed by a set of processors to create analyzed information. A thermal index is generated based on the analyzed information.
摘要:
A computer implemented method, data processing system, and processor are provided for thermal interrupt generation. An interrupt temperature is set to a first temperature and an interrupt direction is to a greater than or equal to determination. A determination is made as to whether a sensed temperature from a digital thermal sensor meets or exceeds the interrupt temperature in response to the interrupt direction. A first interrupt is generated in response to the sensed temperature meeting or exceeding the interrupt temperature.
摘要:
A system and method for providing an alternate keypad arrangement in a virtual keypad is presented. In the alternate keypad arrangement, the virtual keys are laid out in a non-sequential arrangement. In one embodiment, the labels displayed on the virtual keys appear sequential, however the values registered when the user presses the virtual key does not match the label and, hence, the values are laid out in a non-sequential manner. Using alternate keypad arrangements arranged in patterns enables the user to use a common pattern, or patterns easily remembered by the user, for a wide variety of authentication data used to access a wide variety of systems. Rather than remembering the specific PIN codes and passwords, the user simply remembers a pattern and selects virtual keys that match the pattern.