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    MEMORY DEVICES AND METHODS WHICH MAY FACILITATE TENSOR MEMORY ACCESS
    71.
    发明申请
    MEMORY DEVICES AND METHODS WHICH MAY FACILITATE TENSOR MEMORY ACCESS 有权

    公开(公告)号：US20250147874A1

    公开(公告)日：2025-05-08

    申请号：US19016559

    申请日：2025-01-10

    Applicant: Micron Technology, Inc.

    Inventor： Fa-Long Luo ,  Jaime Cummins ,  Tamara Schmitz ,  Jeremy Chritz

    IPC: G06F12/02 ,  G06F12/06 ,  G06F12/0864 ,  G06F12/0893

    Abstract: Methods, apparatuses, and systems for tensor memory access are described. Multiple data located in different physical addresses of memory may be concurrently read or written by, for example, employing various processing patterns of tensor or matrix related computations. A memory controller, which may comprise a data address generator, may be configured to generate a sequence of memory addresses for a memory access operation based on a starting address and a dimension of a tensor or matrix. At least one dimension of a tensor or matrix may correspond to a row, a column, a diagonal, a determinant, or an Nth dimension of the tensor or matrix. The memory controller may also comprise a buffer configured to read and write the data generated from or according to a sequence of memory of addresses.

    Wireless devices and systems including examples of cross correlating wireless transmissions
    72.
    发明授权
    Wireless devices and systems including examples of cross correlating wireless transmissions 有权

    公开(公告)号：US11902411B2

    公开(公告)日：2024-02-13

    申请号：US18065097

    申请日：2022-12-13

    Applicant: MICRON TECHNOLOGY, INC.

    Inventor： Fa-Long Luo ,  Tamara Schmitz ,  Jeremy Chritz ,  Jaime Cummins

    IPC: H04L7/04 ,  H04L27/00 ,  H04L27/26

    CPC classification number: H04L7/042 ,  H04L27/0006 ,  H04L27/2647 ,  H04L27/2663 ,  H04L27/2678

    Abstract: Examples described herein include systems and methods which include wireless devices and systems with examples of cross correlation including symbols indicative of radio frequency (RF) energy. An electronic device including a statistic calculator may be configured to calculate a statistic including the cross-correlation of the symbols. The electronic device may include a comparator configured to provide a signal indicative of a presence or absence of a wireless communication signal in the particular portion of the wireless spectrum based on a comparison of the statistic with a threshold. A decoder/precoder may be configured to receive the signal indicative of the presence or absence of the wireless communication signal and to decode the symbols responsive to a signal indicative of the presence of the wireless communication signal. Examples of systems and methods described herein may facilitate the processing of data for wireless communications in a power-efficient and time-efficient manner.

    Autocorrelation and memory allocation for wireless communication
    74.
    发明授权
    Autocorrelation and memory allocation for wireless communication 有权

    公开(公告)号：US11791872B2

    公开(公告)日：2023-10-17

    申请号：US17453914

    申请日：2021-11-08

    Applicant: MICRON TECHNOLOGY, INC.

    Inventor： Fa-Long Luo ,  Tamara Schmitz ,  Jeremy Chritz ,  Jaime Cummins

    IPC: H04B7/0456 ,  H04B7/08 ,  G06F17/15 ,  H04B7/0413 ,  H04W84/00

    CPC classification number: H04B7/0456 ,  G06F17/15 ,  G06F17/153 ,  H04B7/0413 ,  H04B7/08 ,  H04W84/005

    Abstract: Examples described herein include systems and methods which include wireless devices and systems with examples of an autocorrelation calculator. An electronic device including an autocorrelation calculator may be configured to calculate an autocorrelation matrix including an autocorrelation of symbols indicative of a first narrowband Internet of Things (IoT) transmission and a second narrowband IoT transmission. The electronic device may calculate the autocorrelation matrix based on a stored autocorrelation matrix and the autocorrelation of symbols indicative of the first narrowband IoT transmission and symbols indicative of the second narrowband IoT transmission. The stored autocorrelation matrix may represent another received signal at a different time period than a time period of the first and second narrowband IoT transmission. Examples of the systems and methods may facilitate the processing of data for wireless and may utilize less memory space than a device than a scheme that stores and calculates autocorrelation from a large dataset computed from various time points.

    VERIFICATION OF A VOLATILE MEMORY USING A UNIQUE IDENTIFIER
    76.
    发明公开
    VERIFICATION OF A VOLATILE MEMORY USING A UNIQUE IDENTIFIER 审中-公开

    公开(公告)号：US20230205430A1

    公开(公告)日：2023-06-29

    申请号：US17694355

    申请日：2022-03-14

    Applicant: Micron Technology, Inc.

    Inventor： Aaron Boehm ,  Jeremy Chritz ,  David Hulton ,  Tamara Schmitz ,  Max Vohra

    IPC: G06F3/06

    CPC classification number: G06F3/0619 ,  G06F3/0659 ,  G06F3/0679

    Abstract: Methods, systems, and devices for verification of a volatile memory, such as a dynamic random-access memory (DRAM), using a unique identifier (ID) are described. A memory device may store a unique ID for a DRAM component of the memory device in non-volatile memory (e.g., in the DRAM, external to the DRAM). A host device coupled with the memory device may store, to non-volatile memory at the host device, information for verifying the identity of the DRAM component, for example, based on the unique ID. The memory device and host device may perform a procedure for verification of the identity of the DRAM component using the unique ID of the DRAM and the verification information stored at the host device. If the host device detects that the DRAM has been replaced or modified based on the verification procedure, the host device may disable one or more features of the memory device.

    DSP execution slice array to provide operands to multiple logic units
    78.
    发明授权
    DSP execution slice array to provide operands to multiple logic units 有权

    公开(公告)号：US11669344B2

    公开(公告)日：2023-06-06

    申请号：US16117529

    申请日：2018-08-30

    Applicant: MICRON TECHNOLOGY, INC.

    Inventor： Gregory Edvenson ,  Jeremy Chritz ,  David Hulton

    IPC: G06F15/80 ,  G06F9/448 ,  G06F9/30 ,  G06F8/30 ,  G06F9/445

    CPC classification number: G06F9/4496 ,  G06F8/31 ,  G06F9/30007 ,  G06F9/30109 ,  G06F9/44505 ,  G06F15/80

    Abstract: Apparatuses and methods are disclosed for an FPGA architecture that may improve processing speed and efficiency in processing less complex operands. Some applications may utilize operands that are less complex, such as operands that are 1, 2, or 4 bits, for example. In some examples, the DSP architecture may skip or avoid processing all received operands or may process a common operand more frequently than other operands. An example apparatus may include a first configurable logic unit configured to receive a first operand and a second operand; a second configurable logic unit configured to receive a third operand and the first calculated operand; a first switch configured to receive the first operand and a fourth operand and to output a first selected operand; and a second switch configured to receive the second calculated operand and the first selected operand.

    ATTESTATION LOGIC ON MEMORY FOR MEMORY DIE VERIFICATION
    79.
    发明申请
    ATTESTATION LOGIC ON MEMORY FOR MEMORY DIE VERIFICATION 有权

    公开(公告)号：US20230119361A1

    公开(公告)日：2023-04-20

    申请号：US18068419

    申请日：2022-12-19

    Applicant: MICRON TECHNOLOGY, INC.

    Inventor： Jeremy Chritz ,  David Hulton ,  Tamara Schmitz

    IPC: H04L9/08 ,  H04L9/32 ,  H03K19/17768

    Abstract: Examples described herein provide for attestation of memory dies using a respective memory identifier of the memory die itself. A memory device may include a memory die with a memory array, attestation logic, and programmable circuitry that stores a memory identifier associated with the memory array. The attestation logic may generate an encryption key pair based on the memory identifier stored in the programmable circuitry. Advantageously, by attesting memory die using a memory identifier stored in programmable circuitry, examples of systems and methods described herein may provide increased security for data processed by memory die. For example, a non-attested or compromised memory die may be remediated. The attestation of memory dies may include attestation of memory dies on wireless devices, drones, vehicles, and/or Internet-of-Things devices.

    MEMORY DEVICES AND METHODS WHICH MAY FACILITATE TENSOR MEMORY ACCESS
    80.
    发明申请
    MEMORY DEVICES AND METHODS WHICH MAY FACILITATE TENSOR MEMORY ACCESS 有权

    公开(公告)号：US20220398190A1

    公开(公告)日：2022-12-15

    申请号：US17888748

    申请日：2022-08-16

    Applicant: Micron Technology, Inc.

    Inventor： Fa-Long Luo ,  Jaime Cummins ,  Tamara Schmitz ,  Jeremy Chritz

    IPC: G06F12/02 ,  G06F12/0893 ,  G06F12/0864

    Abstract: Methods, apparatuses, and systems for tensor memory access are described. Multiple data located in different physical addresses of memory may be concurrently read or written by, for example, employing various processing patterns of tensor or matrix related computations. A memory controller, which may comprise a data address generator, may be configured to generate a sequence of memory addresses for a memory access operation based on a starting address and a dimension of a tensor or matrix. At least one dimension of a tensor or matrix may correspond to a row, a column, a diagonal, a determinant, or an Nth dimension of the tensor or matrix. The memory controller may also comprise a buffer configured to read and write the data generated from or according to a sequence of memory of addresses.

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