公开(公告)号：US06511868B2

公开(公告)日：2003-01-28

申请号：US09901761

申请日：2001-07-09

申请人： Zhongze Wang ,  Michael P. Violette ,  Jigish Trivedi

发明人： Zhongze Wang ,  Michael P. Violette ,  Jigish Trivedi

IPC分类号： H01L2182

CPC分类号： H01L21/76888 ,  H01L23/5256 ,  H01L23/5258 ,  H01L2924/0002 ,  H01L2924/00

摘要： Fuses for integrated circuits and semiconductor devices, methods for making the same, methods of using the same, and semiconductor devices containing the same. The semiconductor fuse contains two conductive layers-an overlying and underlying layer-on an insulating substrate. The underlying layer comprises titanium nitride and the overlying layer comprises tungsten silicide. The semiconductor fuse may be fabricated during manufacture of a local interconnect structure containing the same materials. The fuse, which may be used to program redundant circuitry, is blown by electrical current rather than laser beams, thus allowing the fuse width to be smaller than prior art fuses blown by laser beams. The fuse may also be blown by less electrical current than the current required to blow conventional polysilicon fuses having similar dimensions.

公开(公告)号：US06410367B2

公开(公告)日：2002-06-25

申请号：US09759852

申请日：2001-01-12

申请人： Kenneth W. Marr ,  Michael P. Violette

发明人： Kenneth W. Marr ,  Michael P. Violette

IPC分类号： H01L2182

CPC分类号： H01L23/5256 ,  H01L2924/0002 ,  H01L2924/00

摘要： A metal silicide fuse for a semiconductor device. The fuse includes a conductive region positioned adjacent a common well of a first conductivity type, a terminal region positioned adjacent a well of a second conductivity type, and a narrowed region located between the terminal region and the conductive region and positioned adjacent a boundary between the two wells. Upon applying at least a programming current to the fuse, the fuse “blows” at the narrowed region. The diodes between wells of different conductivity types wells and the Schottky diode or diodes between the remaining portions of the fuse and wells adjacent thereto control the flow of current through the remainder of the fuse and through the associated wells of the semiconductor device. When the fuse has been “blown,” the diodes and Schottky diodes prevent current of a normal operating voltage from flowing through the wells of the semiconductor device.

摘要翻译： 一种用于半导体器件的金属硅化物熔断器。 保险丝包括邻近第一导电类型的公共孔定位的导电区域，邻近第二导电类型的阱定位的端子区域和位于端子区域和导电区域之间并且位于邻近第二导电类型之间的边界处的狭窄区域 两口井。 当至少向保险丝施加编程电流时，保险丝在变窄的区域“吹”。 不同导电类型阱的阱之间的二极管和保险丝的剩余部分与其相邻的阱之间的肖特基二极管或二极管控制通过保险丝的其余部分和通过半导体器件的相关阱的电流流动。 当熔断器“熔断”时，二极管和肖特基二极管阻止正常工作电压的电流流过半导体器件的阱。

公开(公告)号：US06403458B2

公开(公告)日：2002-06-11

申请号：US09055056

申请日：1998-04-03

申请人： Jigish D. Trivedi ,  Michael P. Violette

发明人： Jigish D. Trivedi ,  Michael P. Violette

IPC分类号： H01L214763

CPC分类号： H01L21/76895 ,  H01L23/53257 ,  H01L2924/0002 ,  H01L2924/00

摘要： A process for making a local interconnect and the structures formed thereby. The process is practiced by forming a Ti layer having a nitrogen-rich upper portion over a portion of a substrate, forming a refractory metal layer on the Ti layer, forming a Si layer on the refractory metal layer, removing a portion of the Si layer, and heating to form a local interconnect structure. During this process, a source structure for the local interconnect is formed. This source structure comprises a Ti layer having a nitrogen-rich upper portion overlying a portion of a substrate, a refractory metal layer overlying the Ti layer, and a silicon layer overlying the refractory metal layer. The resulting local interconnect comprises a titanium silicide layer disposed on a portion of a substrate, a nitrogen-rich Ti layer disposed on the titanium silicide layer, and a refractory-metal silicide layer disposed on the nitrogen-rich Ti layer. The local interconnect is especially useful for reducing cratering and consumption of silicon regions underlying the local interconnect.

摘要翻译： 一种制造局部​​互连的方法及由此形成的结构。 该方法通过在衬底的一部分上形成富含氮的上部的Ti层，在Ti层上形成难熔金属层，在难熔金属层上形成Si层，除去Si层的一部分 并加热以形成局部互连结构。 在该过程中，形成用于局部互连的源结构。 该源结构包括具有覆盖在衬底的一部分上的富氮上部的Ti层，覆盖在Ti层上的难熔金属层和覆盖在难熔金属层上的硅层。 得到的局部互连包括设置在衬底的一部分上的硅化钛层，设置在硅化钛层上的富氮Ti层和设置在富氮Ti层上的难熔金属硅化物层。 局部互连特别适用于减少局部互连底层硅片的凹坑和消耗。

公开(公告)号：US06277674B1

公开(公告)日：2001-08-21

申请号：US09165754

申请日：1998-10-02

申请人： Zhongze Wang ,  Michael P. Violette ,  Jigish Trivedi

发明人： Zhongze Wang ,  Michael P. Violette ,  Jigish Trivedi

IPC分类号： H01L2182

CPC分类号： H01L21/76888 ,  H01L23/5256 ,  H01L23/5258 ,  H01L2924/0002 ,  H01L2924/00

摘要： Fuses for integrated circuits and semiconductor devices, methods for making the same, methods of using the same, and semiconductor devices containing the same. The semiconductor fuse contains two conductive layers—an overlying and underlying layer—on an insulating substrate. The underlying layer comprises titanium nitride and the overlying layer comprises tungsten silicide. The semiconductor fuse may be fabricated during manufacture of a local interconnect structure containing the same materials. The fuse, which may be used to program redundant circuitry, is blown by electrical current rather than laser beams, thus allowing the fuse width to be smaller than prior art fuses blown by laser beams. The fuse may also be blown by less electrical current than the current required to blow conventional polysilicon fuses having similar dimensions.

摘要翻译： 用于集成电路和半导体器件的保险丝，其制造方法，使用该保险丝的方法以及包含该保险丝的半导体器件。 半导体熔丝在绝缘基板上包含两层导电层 - 覆盖层和下层。 底层包括氮化钛，上覆层包括硅化钨。 半导体保险丝可以在制造包含相同材料的局部互连结构时制造。 可用于编程冗余电路的保险丝由电流而不是激光束吹扫，从而允许熔丝宽度小于由激光束吹制的现有技术的熔丝。 熔断器也可能被吹过比吹出具有相似尺寸的常规多晶硅保险丝所需的电流更小的电流。

公开(公告)号：US6160296A

公开(公告)日：2000-12-12

申请号：US338211

申请日：1999-06-22

申请人： Michael P. Violette ,  Sanh Tang ,  Daniel M. Smith

发明人： Michael P. Violette ,  Sanh Tang ,  Daniel M. Smith

IPC分类号： H01L21/3205 ,  H01L21/3213 ,  H01L21/768 ,  H01L29/76 ,  H01L23/48 ,  H01L29/94

CPC分类号： H01L21/76855 ,  H01L21/32053 ,  H01L21/32137 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76895

摘要： A method for use in the fabrication of semiconductor devices includes forming a titanium nitride film and depositing a silicon hard mask over the titanium nitride film. The silicon hard mask is used to pattern a titanium nitride interconnect from the titanium nitride film and the silicon hard mask is also used as a contact etch stop for forming a contact area. In forming the interconnect, the silicon hard mask is dry etched stopping selectively on and exposing portions of the titanium nitride film and the exposed portions of the titanium nitride film are etched resulting in the titanium nitride interconnect. In using the silicon hard mask as a contact etch stop, an insulating layer is deposited over the silicon hard mask and the insulating layer is etched using the silicon hard mask as an etch stop to form the contact area. The silicon hard mask is then converted to a metal silicide contact area. Interconnects formed using the method are also described.

摘要翻译： 用于制造半导体器件的方法包括在氮化钛膜上形成氮化钛膜并沉积硅硬掩模。 硅硬掩模用于从氮化钛膜图案化氮化钛互连，并且硅硬掩模也用作用于形成接触区域的接触蚀刻停止。 在形成互连件时，将硅硬掩模干蚀刻选择性地停止并暴露氮化钛膜的部分，并且氮化钛膜的暴露部分被蚀刻，导致氮化钛互连。 在使用硅硬掩模作为接触蚀刻停止件时，在硅硬掩模上沉积绝缘层，并且使用硅硬掩模作为蚀刻停止层来蚀刻绝缘层以形成接触区域。 然后将硅硬掩模转换成金属硅化物接触区域。 还描述了使用该方法形成的互连。

公开(公告)号：US6140214A

公开(公告)日：2000-10-31

申请号：US141541

申请日：1998-08-28

申请人： Michael P. Violette ,  Fernando Gonzalez

发明人： Michael P. Violette ,  Fernando Gonzalez

IPC分类号： H01L21/265 ,  H01L21/285 ,  H01L21/329 ,  H01L21/425

CPC分类号： H01L29/66143 ,  H01L21/28518 ,  H01L21/28537 ,  H01L21/26586

摘要： Semiconductor processing methods, semiconductor processing methods of forming diodes, and semiconductor processing methods of forming Schottky diodes are described. In one embodiment, a first layer of material is formed over a substrate. A second layer of material is formed over the first layer of material. An opening is formed to extend through the first and second layers sufficient to expose a portion of the substrate. An angled ion implant is conducted through the opening and into the substrate. After the conducting of the angled ion implant, the second layer of material is removed. In another embodiment, a diode opening is formed in a layer of material over a semiconductive substrate. In another embodiment, a Schottky diode is formed by forming an opening in a layer of material which is formed over a semiconductive substrate, wherein the opening exposes a substrate portion. An angled ion implant is conducted through the opening and into the semiconductive substrate. A conductive layer of material, e.g. a silicide, is formed within the opening. In another embodiment, a Schottky diode is formed by conducting an angled ion implant of impurity into a semiconductive substrate sufficient to form an impurity ring which is received within the substrate. A conductive Schottky material layer is formed proximate the impurity ring.

摘要翻译： 描述了半导体处理方法，形成二极管的半导体处理方法和形成肖特基二极管的半导体处理方法。 在一个实施例中，在衬底上形成第一层材料。 在第一层材料上形成第二层材料。 形成开口以延伸穿过第一和第二层足以露出基底的一部分。 成角度的离子植入物穿过开口并进入衬底。 在进行成角度的离子注入之后，去除第二层材料。 在另一个实施例中，二极管开口形成在半导体衬底上的材料层中。 在另一个实施例中，肖特基二极管是通过在半导体衬底上形成的材料层中形成开口形成的，其中开口露出衬底部分。 成角度的离子植入物穿过开口并进入半导体衬底。 材料的导电层，例如。 在开口内形成硅化物。 在另一个实施例中，肖特基二极管通过将杂质的成角度离子注入导入足以形成接收在衬底内的杂质环的半导体衬底中而形成。 在杂质环附近形成导电肖特基材料层。

公开(公告)号：US5817580A

公开(公告)日：1998-10-06

申请号：US598490

申请日：1996-02-08

申请人： Michael P. Violette

发明人： Michael P. Violette

IPC分类号： H01L21/311 ,  H01L21/306

CPC分类号： H01L21/31111 ,  H01L21/31116

摘要： A layer of silicon dioxide is formed conformably over a substrate having a surface with non-planar topography. The layer of silicon dioxide is then implanted with a species that affects the etch rate of the silicon dioxide when etched in an HF based etchant. The implant energy, dose, and direction are chosen such that only a selected portion of the layer of silicon dioxide is implanted with the implant species. The layer of silicon dioxide is then etched in an HF based etchant. The HF etchant etches both doped and undoped silicon dioxide, but the implanted silicon dioxide is removed at a faster rate or slower rate, depending on the implant species, than the unimplanted silicon dioxide. This allows the formation of specialized silicon dioxide structures due to the selectivity of the etch as between the implanted and unimplanted portions of the layer of silicon dioxide, without any damage to silicon.

摘要翻译： 在具有非平面形貌的表面的衬底上形成一层二氧化硅。 然后用在基于HF的蚀刻剂中蚀刻时影响二氧化硅的蚀刻速率的物质注入二氧化硅层。 选择植入能量，剂量和方向，使得仅植入物种植入二氧化硅层的选定部分。 然后在基于HF的蚀刻剂中蚀刻二氧化硅层。 HF蚀刻剂蚀刻掺杂的和未掺杂的二氧化硅，但是植入的二氧化硅比未掺杂的二氧化硅以更快的速率或较慢的速率（取决于植入物种）被去除。 这允许由于蚀刻的选择性而形成特殊的二氧化硅结构，这在二氧化硅层的注入部分和未被注入的部分之间，而不会对硅造成任何损害。