Thin film transistor, method of manufacturing the same, and flat panel display having the same
    73.
    发明授权
    Thin film transistor, method of manufacturing the same, and flat panel display having the same 有权
    薄膜晶体管,其制造方法和具有该薄膜晶体管的平板显示器

    公开(公告)号:US08188472B2

    公开(公告)日:2012-05-29

    申请号:US12007085

    申请日:2008-01-07

    IPC分类号: H01L21/786

    摘要: A thin film transistor (TFT), a method of manufacturing the TFT, and a flat panel display comprising the TFT are provided. The TFT includes a gate, a gate insulating layer that contacts the gate, a channel layer that contacts the gate insulating layer and faces the gate with the gate insulating layer therebetween, a source that contacts an end of the channel layer; and a drain that contacts an other end of the channel layer, wherein the channel layer is an amorphous oxide semiconductor layer, and each of the source and the drain is a conductive oxide layer comprising an oxide semiconductor layer having a conductive impurity in the oxide semiconductor layer. A low resistance metal layer can further be included on the source and drain. A driving circuit of a unit pixel of a flat panel display includes the TFT.

    摘要翻译: 提供薄膜晶体管(TFT),制造TFT的方法以及包括TFT的平板显示器。 TFT包括栅极,与栅极接触的栅极绝缘层,与栅极绝缘层接触且与栅极绝缘层面对栅极的沟道层,接触沟道层的端部的源极; 以及与沟道层的另一端接触的漏极,其中,所述沟道层为非晶氧化物半导体层,所述源极和漏极中的每一个为包含氧化物半导体中具有导电杂质的氧化物半导体层的导电氧化物层 层。 源极和漏极可以进一步包含低电阻金属层。 平板显示器的单位像素的驱动电路包括TFT。

    Transistors and methods of manufacturing the same
    74.
    发明申请
    Transistors and methods of manufacturing the same 有权
    晶体管及其制造方法

    公开(公告)号:US20110168993A1

    公开(公告)日:2011-07-14

    申请号:US12801500

    申请日:2010-06-11

    CPC分类号: H01L29/7869

    摘要: Transistors and methods of manufacturing the same. A transistor may be an oxide thin film transistor (TFT) with a self-aligned top gate structure. The transistor may include a gate insulating layer between a channel region and a gate electrode that extends from two sides of the gate electrode. The gate insulating layer may cover at least a portion of source and drain regions.

    摘要翻译: 晶体管及其制造方法。 晶体管可以是具有自对准顶栅极结构的氧化物薄膜晶体管(TFT)。 晶体管可以包括从栅电极的两侧延伸的沟道区和栅电极之间的栅极绝缘层。 栅绝缘层可以覆盖源区和漏区的至少一部分。

    ZnO based semiconductor devices and methods of manufacturing the same
    75.
    发明申请
    ZnO based semiconductor devices and methods of manufacturing the same 有权
    基于ZnO的半导体器件及其制造方法

    公开(公告)号:US20110101343A1

    公开(公告)日:2011-05-05

    申请号:US12929324

    申请日:2011-01-14

    IPC分类号: H01L29/12 H01L33/16

    CPC分类号: H01L29/7869

    摘要: A semiconductor device may include a composite represented by Formula 1 below as an active layer. x(Ga2O3).y(In2O3).z(ZnO)  Formula 1 wherein, about 0.75≦x/z≦about 3.15, and about 0.55≦y/z≦about 1.70.Switching characteristics of displays and driving characteristics of driving transistors may be improved by adjusting the amounts of a gallium (Ga) oxide and an indium (In) oxide mixed with a zinc (Zn) oxide and improving optical sensitivity.

    摘要翻译: 半导体器件可以包括由下面的式1表示的复合物作为有源层。 x(Ga 2 O 3)y(In 2 O 3)z(ZnO)式1其中约0.75< lE; x / z≦̸约3.15和约0.55≤n1E; y /z≤n1E;约1.70。 可以通过调节与锌(Zn)氧化物混合的镓(Ga)氧化物和铟(In))的量来提高驱动晶体管的开关特性并提高光学灵敏度。

    Stacked memory device and method thereof
    78.
    发明申请
    Stacked memory device and method thereof 有权
    堆叠式存储器件及其方法

    公开(公告)号:US20100091541A1

    公开(公告)日:2010-04-15

    申请号:US12588275

    申请日:2009-10-09

    摘要: A stacked memory device includes a plurality of memory layers, where at least one of the plurality of memory layers is stacked on another of the plurality of memory layers and each of the memory layers includes an array of memory cells, a first active circuit unit configured to classify and process address information for at least one of the memory cells as vertical address information and horizontal address information, and at least one second active circuit unit configured to generate a memory selection signal for at least one of the memory cells based on signals processed by the first active circuit unit.

    摘要翻译: 堆叠存储器件包括多个存储器层,其中多个存储器层中的至少一个堆叠在多个存储器层中的另一个上,并且每个存储器层包括存储器单元阵列,第一有源电路单元配置 将至少一个存储器单元的地址信息分类并处理为垂直地址信息和水平地址信息,以及至少一个第二有源电路单元,配置为基于处理的信号为存储器单元中的至少一个生成存储器选择信号 由第一有源电路单元。

    Electrical fuse device including a fuse link
    79.
    发明申请
    Electrical fuse device including a fuse link 审中-公开
    电熔丝装置包括熔断体

    公开(公告)号:US20090206978A1

    公开(公告)日:2009-08-20

    申请号:US12379347

    申请日:2009-02-19

    IPC分类号: H01H85/10

    摘要: Example embodiments relate to an electrical device, for example, to an electrical fuse device that includes a fuse link for linking a cathode and anode. An electrical device may include a cathode, an anode, and a fuse link. The fuse link may link the cathode and the anode. The fuse link may include a multi-metal layer structure. The fuse link may include a first metal layer including a first resistance, and a second metal layer stacked on the first metal layer and including a second resistance. The first resistance may be different from the second resistance. The fuse link may include a weak point as a region at which electrical blowing is performed easier than other regions of the fuse link.

    摘要翻译: 示例性实施例涉及电气设备,例如电气熔断器件,其包括用于连接阴极和阳极的熔断体。 电气设备可以包括阴极,阳极和熔断体。 熔丝链可以连接阴极和阳极。 熔丝链可以包括多金属层结构。 熔丝连接件可以包括第一金属层和第二金属层,第一金属层包括第一电阻,第二金属层堆叠在第一金属层上并包括第二电阻。 第一阻力可能与第二阻力不同。 熔断体可以包括作为进行电吹送的区域的弱点比熔丝链的其它区域更容易。

    Thin film transistor, method of manufacturing the same, and flat panel display having the same
    80.
    发明申请
    Thin film transistor, method of manufacturing the same, and flat panel display having the same 有权
    薄膜晶体管,其制造方法和具有该薄膜晶体管的平板显示器

    公开(公告)号:US20080258141A1

    公开(公告)日:2008-10-23

    申请号:US12007085

    申请日:2008-01-07

    IPC分类号: H01L21/44 H01L29/12

    摘要: A thin film transistor (TFT), a method of manufacturing the TFT, and a flat panel display comprising the TFT are provided. The TFT includes a gate, a gate insulating layer that contacts the gate, a channel layer that contacts the gate insulating layer and faces the gate with the gate insulating layer therebetween, a source that contacts an end of the channel layer; and a drain that contacts an other end of the channel layer, wherein the channel layer is an amorphous oxide semiconductor layer, and each of the source and the drain is a conductive oxide layer comprising an oxide semiconductor layer having a conductive impurity in the oxide semiconductor layer. A low resistance metal layer can further be included on the source and drain. A driving circuit of a unit pixel of a flat panel display includes the TFT.

    摘要翻译: 提供薄膜晶体管(TFT),制造TFT的方法以及包括TFT的平板显示器。 TFT包括栅极,与栅极接触的栅极绝缘层,与栅极绝缘层接触且与栅极绝缘层面对栅极的沟道层,接触沟道层的端部的源极; 以及与沟道层的另一端接触的漏极,其中,所述沟道层为非晶氧化物半导体层,所述源极和漏极中的每一个为包含氧化物半导体中具有导电杂质的氧化物半导体层的导电氧化物层 层。 源极和漏极可以进一步包含低电阻金属层。 平板显示器的单位像素的驱动电路包括TFT。