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1.发明授权Voltage generating circuit capable of supplying stable output voltage regardless of external input voltage 失效电压发生电路，无论外部输入电压如何，均能提供稳定的输出电压公开(公告)号：US06980048B2
公开(公告)日：2005-12-27
申请号：US10384557
申请日：2003-03-11
Applicant: Kee-won Kwon
Inventor： Kee-won Kwon
CPC classification number: G05F1/565
Abstract: A voltage generating circuit capable of generating a stable output voltage irrespective of a variation in external voltage. The voltage generating circuit includes a voltage comparing circuit that operates in response to an activation signal and outputs output voltage to a control node in response to a difference between a reference voltage and an internal voltage; an internal voltage control circuit that is connected to the control node, and receives the external voltage and controls the level of the internal voltage, which is applied to a load, in response to a voltage value of the control node, and an adjusting means for adjusting an amount of driving current flowing through the internal voltage control circuit by controlling the voltage level at the control node. The adjusting means may include any combination of a clamp circuit, a voltage compensating circuit, and a voltage drop circuit.
Abstract translation: 一种电压产生电路，能够产生稳定的输出电压，而与外部电压的变化无关。 电压产生电路包括响应于激活信号而工作的电压比较电路，并响应于参考电压和内部电压之间的差异将输出电压输出到控制节点; 内部电压控制电路，其连接到所述控制节点，并且响应于所述控制节点的电压值接收所述外部电压并且控制施加到负载的内部电压的电平;以及调整装置， 通过控制控制节点处的电压电平来调节流过内部电压控制电路的驱动电流的量。 调整装置可以包括钳位电路，电压补偿电路和电压降电路的任何组合。
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2.发明申请Output drivers having adjustable swing widths during test mode operation 有权输出驱动器在测试模式操作期间具有可调整的摆幅宽度公开(公告)号：US20050218934A1
公开(公告)日：2005-10-06
申请号：US11098818
申请日：2005-04-05
Applicant: Seung-hoon Lee , Kee-won Kwon , Jung-hwan Choi
Inventor： Seung-hoon Lee , Kee-won Kwon , Jung-hwan Choi
IPC: H01L21/822 , H01L21/82 , H01L27/04 , H03K19/0175 , H03K19/0185 , H04L25/02
CPC classification number: H03K19/018585
Abstract: An output driver is responsive to an input signal and a swing width control signal (TE). The output driver is configured to generate an output signal having a first swing width (e.g., less than rail-to-rail) when the swing width control signal designates a normal mode of operation and a second swing width (e.g., rail-to-rail) when the swing width control signal designates a test mode of operation.
Abstract translation: 输出驱动器响应于输入信号和摆幅控制信号（TE）。 输出驱动器被配置为当摆幅控制信号指定正常操作模式和第二摆幅宽度（例如，轨至轨）时，产生具有第一摆动宽度（例如，小于轨至轨）的输出信号， 摇摆宽度控制信号指定测试操作模式时。
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公开(公告)号：US08384439B2
公开(公告)日：2013-02-26
申请号：US12591701
申请日：2009-11-30
Applicant: Jae-chul Park , I-hun Song , Young-soo Park , Kee-won Kwon , Chang-jung Kim , Kyoung-kook Kim , Sung-ho Park , Sung-hoon Lee , Sang-wook Kim , Sun-il Kim
Inventor： Jae-chul Park , I-hun Song , Young-soo Park , Kee-won Kwon , Chang-jung Kim , Kyoung-kook Kim , Sung-ho Park , Sung-hoon Lee , Sang-wook Kim , Sun-il Kim
CPC classification number: H01L29/7869 , H01L27/0207 , H01L27/11521 , H01L27/11807 , H01L27/1225 , H01L27/1251 , H01L29/41733 , H01L29/78648
Abstract: Provided are a semiconductor device and a method of fabricating the semiconductor device. The semiconductor device may be a complementary device including a p-type oxide TFT and an n-type oxide TFT. The semiconductor device may be a logic device such as an inverter, a NAND device, or a NOR device.
Abstract translation: 提供半导体器件和制造半导体器件的方法。 半导体器件可以是包括p型氧化物TFT和n型氧化物TFT的互补器件。 半导体器件可以是诸如逆变器，NAND器件或NOR器件的逻辑器件。
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公开(公告)号：US08319425B2
公开(公告)日：2012-11-27
申请号：US12656441
申请日：2010-01-29
Applicant: Kee-Won Kwon
Inventor： Kee-Won Kwon
CPC classification number: H01L27/3276 , G06K19/07749 , H01L27/3225 , H01L51/524 , H01Q1/2208 , H01Q1/36
Abstract: An organic light emitting display device having RFID includes a substrate including a pixel region having at least one organic light emitting device and a non-pixel region formed on the outer circumference of the pixel region, a sealing substrate that seals at least the pixel region of the substrate, an RFID antenna pattern on the sealing substrate, and an RFID chip electrically coupled to the RFID antenna pattern.
Abstract translation: 具有RFID的有机发光显示装置包括具有至少一个有机发光元件的像素区域和形成在像素区域的外周上的非像素区域的基板，至少将像素区域 衬底，密封衬底上的RFID天线图案和电耦合到RFID天线图案的RFID芯片。
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公开(公告)号：US20100207506A1
公开(公告)日：2010-08-19
申请号：US12656441
申请日：2010-01-29
Applicant: Kee-Won Kwon
Inventor： Kee-Won Kwon
IPC: H01J1/00
CPC classification number: H01L27/3276 , G06K19/07749 , H01L27/3225 , H01L51/524 , H01Q1/2208 , H01Q1/36
Abstract: An organic light emitting display device having RFID includes a substrate including a pixel region having at least one organic light emitting device and a non-pixel region formed on the outer circumference of the pixel region, a sealing substrate that seals at least the pixel region of the substrate, an RFID antenna pattern on the sealing substrate, and an RFID chip electrically coupled to the RFID antenna pattern.
Abstract translation: 具有RFID的有机发光显示装置包括具有至少一个有机发光元件的像素区域和形成在像素区域的外周上的非像素区域的基板，至少将像素区域 衬底，密封衬底上的RFID天线图案和电耦合到RFID天线图案的RFID芯片。
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Patent Agency Ranking
6.发明申请公开(公告)号：US20060291313A1
公开(公告)日：2006-12-28
申请号：US11375808
申请日：2006-03-14
Applicant: Kee-Won Kwon
Inventor： Kee-Won Kwon
IPC: G11C7/02
CPC classification number: G11C7/062 , G11C11/4097
Abstract: A sense amplifier including a pair of differential transistors configured to amplify a differential signal applied to a pair of I/O lines, each transistor having a terminal, a current supplying circuit configured to supply a current to the differential transistors in response to an enable signal, and a coupling element configured to electrically connect or disconnect the terminals of the differential transistors in response to the enable signal.
Abstract translation: 一种感测放大器，包括一对差动晶体管，其被配置为放大施加到一对I / O线的差分信号，每个晶体管具有端子;电流供应电路，被配置为响应于使能信号向差分晶体管提供电流 以及耦合元件，其被配置为响应于使能信号电连接或断开差分晶体管的端子。
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7.发明申请Semiconductor memory devices having a dual port mode and methods of operating the same 有权具有双端口模式的半导体存储器件及其操作方法公开(公告)号：US20060098519A1
公开(公告)日：2006-05-11
申请号：US11258766
申请日：2005-10-26
Applicant: Kee-Won Kwon
Inventor： Kee-Won Kwon
IPC: G11C8/00
CPC classification number: G11C7/1075
Abstract: A memory device having a dual port function includes a memory cell array and a switching unit. The memory cell array has a first port and a second port. The switching unit assigns first data received through a data bus to the first port in response to a leading edge of a clock signal and assigns second data received through the data bus to the second port in response to a trailing edge of the clock. Methods of operating memory devices having a dual port mode are also disclosed.
Abstract translation: 具有双端口功能的存储器件包括存储单元阵列和切换单元。 存储单元阵列具有第一端口和第二端口。 切换单元响应于时钟信号的前沿将通过数据总线接收的第一数据分配给第一端口，并且响应于时钟的后沿将通过数据总线接收的第二数据分配给第二端口。 还公开了具有双端口模式的存储器件的操作方法。
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8.发明申请Digital-to-analog converter (DAC) circuits using different currents for calibration biasing and methods of operating same 有权使用不同电流的数模转换器（DAC）电路用于校准偏置和操作方法公开(公告)号：US20050270208A1
公开(公告)日：2005-12-08
申请号：US11141536
申请日：2005-05-31
Applicant: Kee-Won Kwon
Inventor： Kee-Won Kwon
CPC classification number: H03M1/1061 , H03M1/785
Abstract: A DAC circuit can include a plurality of current source circuits configured to operate responsive to respective different bias voltage signals and respective true and complementary binary digit signals.
Abstract translation: DAC电路可以包括多个电流源电路，其被配置为响应于各个不同的偏置电压信号和相应的真和互补的二进制数字信号而进行操作。
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公开(公告)号：US08547719B2
公开(公告)日：2013-10-01
申请号：US12588275
申请日：2009-10-09
Applicant: Jae-chul Park , Kee-won Kwon , I-hun Song , Young-soo Park , Chang-jung Kim , Sang-wook Kim , Sun-il Kim
Inventor： Jae-chul Park , Kee-won Kwon , I-hun Song , Young-soo Park , Chang-jung Kim , Sang-wook Kim , Sun-il Kim
IPC: G11C5/02
CPC classification number: G11C5/02 , G11C5/143 , G11C7/18 , G11C8/12 , G11C13/0023 , G11C2213/71
Abstract: A stacked memory device includes a plurality of memory layers, where at least one of the plurality of memory layers is stacked on another of the plurality of memory layers and each of the memory layers includes an array of memory cells, a first active circuit unit configured to classify and process address information for at least one of the memory cells as vertical address information and horizontal address information, and at least one second active circuit unit configured to generate a memory selection signal for at least one of the memory cells based on signals processed by the first active circuit unit.
Abstract translation: 堆叠存储器件包括多个存储器层，其中多个存储器层中的至少一个堆叠在多个存储器层中的另一个上，并且每个存储器层包括存储器单元阵列，第一有源电路单元配置 将至少一个存储器单元的地址信息分类并处理为垂直地址信息和水平地址信息，以及至少一个第二有源电路单元，配置为基于处理的信号为存储器单元中的至少一个生成存储器选择信号 由第一有源电路单元。
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10.发明授权Non-volatile memory device including block state confirmation cell and method of operating the same 有权包括块状态确认单元的非易失性存储器件及其操作方法公开(公告)号：US08050087B2
公开(公告)日：2011-11-01
申请号：US12071349
申请日：2008-02-20
Applicant: Ju-hee Park , Jae-woong Hyun , Kyoung-lae Cho , Yoon-dong Park , Seung-hoon Lee , Kee-won Kwon
Inventor： Ju-hee Park , Jae-woong Hyun , Kyoung-lae Cho , Yoon-dong Park , Seung-hoon Lee , Kee-won Kwon
CPC classification number: G11C11/5642 , G11C2211/5641 , G11C2211/5646
Abstract: Provided are a semiconductor device having a block state confirmation cell that may store information indicating the number of data bits written to a plurality of memory cells, a method of reading memory data based on the number of the data bits written, and/or a memory programming method of storing the information indicating the number of the data bits written. The semiconductor device may include one or more memory blocks and a controller. Each of the memory blocks may include a plurality of memory cells each storing data, and a block state confirmation cell storing information indicating the number of data bits written to the memory cells. The controller may read the data bits from the memory blocks based on the number of data bits, which is indicated in the information in the block state confirmation cell.
Abstract translation: 提供了具有块状态确认单元的半导体器件，其可以存储指示写入多个存储器单元的数据位数的信息，基于写入的数据位的数量读取存储器数据的方法和/或存储器 存储指示写入数据位数的信息的编程方法。 半导体器件可以包括一个或多个存储器块和控制器。 每个存储器块可以包括存储数据的多个存储单元，以及存储指示写入存储单元的数据位数的信息的块状态确认单元。 控制器可以基于在块状态确认单元中的信息中指示的数据位数来从存储器块读取数据位。
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